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QST108 Datasheet(PDF) 35 Page - STMicroelectronics |
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QST108 Datasheet(HTML) 35 Page - STMicroelectronics |
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35 / 38 page  QST108 Electrical characteristics 35/38 6.8 I2C control interface Subject to general operating conditions for VDD, and TA unless otherwise specified. The QST108 I2C interface meets the requirements of the Standard I2C communication protocol described in the following table with the restriction mentioned below: Refer to I/O port characteristics for more details on the input/output alternate function characteristics (SDA and SCL). Figure 19. Typical application with I2C bus and timing diagram Table 29. I²C characteristics Symbol Parameter Standard mode Fast mode Unit Min. (1) 1. Data based on standard I2C protocol requirement, not tested in production. Max. (1) Min. (1) Max. (1) tw(SCLL) SCL clock low time 4.7 1.3 µs tw(SCLH) SCL clock high time 4.0 0.6 tsu(SDA) SDA setup time 250 100 ns th(SDA) SDA data hold time 0 (3) 0 (2) 2. The device must internally proivde a hold time of at least 300ns for the SDA signal in order to bridge the undefined region of the falling esdge of the SCL signal. 900 (3) 3. The maximum hold time of the START condition has only to be met if the interface does not stretch the low period of the SCL signal. tr(SDA) tr(SCL) SDA and SCL rise time 1000 300 ns tf(SDA) tf(SCL) SDA and SCL fall time 300 300 th(STA) START condition hold time 4.0 0.6 µs tsu(STA) Repeated START condition setup time 4.7 0.6 tsu(STO) STOP condition setup time 4.0 0.6 μs tw(STO:STA) STOP to START condition time (bus free) 4.7 1.3 µs Cb Capacitive load for each bus line 400 400 pF REPEATED START START STOP START tf(SDA) tr(SDA) tsu(SDA) th(SDA) tf(SCK) tr(SCK) tw(SCKL) tw(SCKH) th(STA) tsu(STO) tsu(STA) tw(STO:STA) SDA SCL 4.7k Ω SDA QST108 SCL VDD 100 Ω 100 Ω VDD 4.7k Ω I2CBUS |
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