ST7263BHX datasheet(100/145 Pages) STMICROELECTRONICS

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8-bit A/D converter (ADC) (Cont’d)

12.6.6 Register description

Control/Status Register (CSR)

Read/Write

Reset value: 0000 0000 (00h)

Bit 7 = COCO Conversion Complete

This bit is set by hardware. It is cleared by soft-

ware reading the result in the DR register or writing

to the CSR register.

0: Conversion is not complete

1: Conversion can be read from the DR register

Bit 6 = Reserved. must always be cleared.

Bit 5 = ADON A/D Converter On

This bit is set and cleared by software.

0: A/D converter is switched off

1: A/D converter is switched on

Bit 4 = Reserved. must always be cleared.

Bits 3:0 = CH[3:0] Channel Selection

These bits are set and cleared by software. They

select the analog input to convert.

1 The number of pins AND the channel selection

varies according to the device. Refer to the device

pinout.

2 For SDIP/SO34 devices, the CH3 bit is always at

‘0’. If, however, set to ‘1’ on error, channel (11:8)

becomes enabled which may result in a higher and

unnecessary level of consumption.

Data Register (DR)

Read Only

Reset value: 0000 0000 (00h)

Bits 7:0 = D[7:0] Analog Converted value

This register contains the converted analog value

in the range 00h to FFh.

Note: Reading this register reset the COCO flag.

COCO

ADON

CH3

CH2

CH1

CH0

Channel Pin1

CH32

CH2

CH1

CH0

AIN0

000

AIN1

001

AIN2

010

AIN3

011

AIN4

100

AIN5

101

AIN6

110

AIN7

111

AIN8

000

AIN9

001

AIN10

010

AIN11

011

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