FSL336LR

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3

PIN CONFIGURATION

GND

VCC

VCOMP

ILIMIT

VFB

Drain

7DIP

7LSOP

Figure 4. Pin Configuration

Drain

PIN DEFINITIONS

Pin #

Name

Description

1

GND

Ground. SENSEFET source terminal on the primary side and internal control ground.

2

VCC

Positive Supply Voltage Input. This pin is the positive supply input that provides the internal operating current for startup

and steady−state operation. This pin voltage is regulated to 10 V, without the external bias circuit, via an internal 10−V

HVREG (see Figure 3). When the external bias voltage is >10 V, it disables the internal high−voltage regulator to re-

duce power consumption.

3

ILIMIT

Peak Current Limit. Adjusts the peak current limit of the SENSEFET. The internal 50

mA current source is diverted to

the parallel combination of an internal 46 k

W (3R + R) resistor and any external resistor to GND on this pin to determine

the peak current limit.

4

VFB

Feedback Voltage. Inverting input of the transconductance amplifier. This pin controls the converter output voltage by

outputting a VCOMP−pin current proportional to the difference between the reference voltage and the output voltage

divided by external resistor divider.

5

VCOMP

Comp Voltage. Output of the transconductance amplifier. The compensation networks are placed between the VCOMP

and GND pins to achieve stability and good dynamic performance.

6, 7

Drain

Drain. High−voltage power SENSEFET drain connection. In addition, during startup and steady−state operation; the

internal high−voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin.

Once VCC reaches 8 V, all internal blocks are activated. The internal high−voltage current source is enabled until VCC

reaches 10 V. After that, the internal high−voltage regulator turns on and off regularly to maintain VCC at 10 V.