PCI9054 datasheet(2/4 Pages) PLX

2 / 4 page

850/860 processor. The PCI 9054’s flexi-

ble, 3.3V, 5V tolerant I/O buffers com-

bined with a local bus operation up to

50MHz is ideally suited for current and

future PowerQUICC processors. The

PCI 9054 also provides support for the

MPC860 IDMA channel for movement of

data between internal MPC860 I/O and

the PCI bus. In addition, the PCI 9054

also makes use of the advanced Data

Pipe Architecture including unlimited

burst capability as shown in figure 1.

For PowerQUICC IDMA operation,

the PCI 9054 transfers data to PCI

under the control of the IDMA hand-

shake protocol.

At the same time, the PCI 9054 Data

Pipe Architecture™ DMA can be oper-

ated bi-directionally, with the PCI 9054

as the master for both buses, to manage

transfers of data from the local bus

to the PCI bus or from the PCI bus to

the local bus. This is a prime example

of how the PCI 9054 provides superior

general purpose bus master perfor-

mance and gives the designer using the

PowerQUICC processor greater flexibility

in implementing multiple simultaneous

I/O transfers. The PCI 9054 has unlimit-

ed bursting capability which enhances

any MPC860 PowerQUICC design.

High Performance CompactPCI

Adapter Designs

Another key application for the PCI 9054

is CompactPCI adapters for telecom and

networking applications. These applica-

tions include high performance commu-

nications like WAN/LAN controller cards,

high speed modem cards, frame relay

cards, and telephony cards for telecom

switches and remote access systems.

The PCI 9054 has intergrated key

features to enable live-insertion of Hot

Swap CompactPCI adapters. The PCI

9054 PICMG 2.1 compatible Hot Swap

Friendly PCI interface includes both Hot

Swap Capable and Friendly features:

Hot Swap Capable

PCI specification v2.1 or better

Tolerant of Vcc from early power

Tolerant of asynchronous reset

Tolerant of precharge voltage

PCI Initiator

Type 0 and Type 1 configuration cycles

All PCI Memory and I/O cycles supported

Initiator READ prefetching

Burst length control—programmable

threshold pointer

Unaligned transfer control

Endian swapping

PCI Target

Multiple independent address spaces

Dynamic local bus width control

Target READ prefetching

Endian swapping

Local bus priority control

Latency timer

PCI Messaging

Complete messaging unit with mailbox

registers, doorbell registers

Queue management pointers which can

be used for message passing under the

I2O protocol or a custom protocol.

PCI 9054 PCI Applications

High performance Motorola MPC

850/860 PowerQUICC Designs

A key application for the PCI 9054 is

Motorola MPC 850/860 based adapters

for telecom and networking applications.

These applications include high perfor-

mance communications like WAN/LAN

controller cards, high speed modem cards,

frame relay cards, and networking cards

for routers and switches to name a few.

The PCI 9054 simplifies designs by pro-

viding an industry leading enhanced

direct-connect interface to the MPC

PCI 9054 I/O Accelerator

The PCI 9054, a 32-bit 33MHz Bus

Master I/O Accelerator, is the most

advanced general purpose bus master

device available. It offers a robust PCI v2.2

specification implementation enabling

burst transfers up to 132Mbytes/second.

The PCI 9054 incorporates PLX’s industry

leading Data Pipe Architecture

TM including

DMA engines, programmable PCI

Initiator and Target data transfer modes

and PCI messaging functions.

Data Pipe Architecture

™

Dual DMA Channels

Dual independent channels—provides

flexible prioritization scheme

Direct H/W control of DMA

-Demand mode DMA operation

-Block Mode or Scatter/Gather operation

-End of Transfer (EOT) signal

Programmable burst length including

unlimited burst

Shuttle mode DMA channel support

—Automatic invalidation of used

DMA descriptors

Unaligned transfer support

Supports PCI bus mastering from local

slave-only devices

Scatter/Gather list management

-Descriptors can be in the PCI or local

bus memory

-Allows independent scatter/gather

ring management

PCI Bus

Local Bus

ROM

PCI 9054

I/O Accelerator

MEM

PowerQUICC

MPC860

IDMA

DMA 0

DMA 1

Figure 1.

High Performance MPC860

PowerQUICC Adapter Design

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