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TMPR4937 Datasheet(PDF) 348 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 348 Page - Toshiba Semiconductor |
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348 / 552 page ![]() Chapter 10 PCI Controller 10-90 10.4.59 PDMAC G-Bus Address Register (PDMGA) 0xD208 63 48 Reserved : Type : Initial value 47 36 35 32 Reserved PDMGA[35:32] R/W : Type Undefined : Initial value 31 16 PDMGA[31:16] R/W : Type Undefined : Initial value 15 2 1 0 PDMGA[15:2] Reserved R/W : Type Undefined : Initial value Bits Mnemonic Field Name Description Read/Write 63:36 Reserved ⎯ 35:2 PDMGA G-Bus Address PDMAC G-Bus Address (Default is undefined) The G-Bus DMA transfer address is specified by a G-Bus physical address on a 32-bit address boundary. This register value is used for G-Bus Read access during DMA transfer from the G-Bus to the PCI Bus, or it is used for G-Bus Write access during DMA transfer from the PCI Bus to the G-Bus. This register value is held without being affected by a Reset. R/W 1:0 Reserved ⎯ Figure 10.4.57 G-Bus Address Register |
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