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TMPR4937 Datasheet(PDF) 196 Page - Toshiba Semiconductor

Part # TMPR4937
Description  64-Bit TX System RISC TX49 Family
PDF  552 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4937 Datasheet(HTML) 196 Page - Toshiba Semiconductor

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Chapter 8 DMA Controller
8-40
8.5
Timing Diagrams
This section contains timing diagrams for the external I/O DMA transfer mode. The DMAREQ[n]
signals and DMAACK[n] signals in the timing diagrams are set to Low Active.
8.5.1
Single Address Single Transfer from Memory to I/O (32-bit ROM)
Figure 8.5.1 Single Address Single Transfer from Memory to I/O
(Single Read of 32-bit Data from 32-bit ROM)
1c040
SYSCLK
CE*
ADDR [19:0]
ACE*
OE*/BUSSPRT*
SWE*
BWE*
DATA [31:0]
ACK*
DMAREQ
[n]
DMAACK
[n]
DMADONE*
00040
f
00000100



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