UPSD3422 datasheet(222/293 Pages) STMICROELECTRONICS

222 / 293 page

PSD module

uPSD34xx

222/293

Note:

MCELLAB0-MCELLAB7 can be output to Port A pins only on 80-pin devices. Port A is not

available on 52-pin devices

Port pins PC0, PC1, PC5, and PC6 are dedicated JTAG pins and are not available as

outputs for MCELLBC 0, 1, 5, or 6

28.5.31

Loading and reading OMCs

Each of the two OMC groups (eight OMCs each) occupies a byte in csiop space, named

MCELLAB and MCELLBC (see Table 113 and Table 114). When the 8032 writes or reads

these two OMC registers in csiop it is accessing each of the OMCs through its 8-bit data

bus, with the bit assignment shown in Table 112 on page 221. Sometimes it is important to

know the bit assignment when the user builds GPLD logic that is accessed by the 8032. For

example, the user may create a 4-bit counter that must be loaded and read by the 8032, so

the user must know which nibble in the corresponding csiop OMC register the firmware must

access. The fitter report generated by PSDsoft Express will indicate how it assigned the

OMCs and data bus bits to the logic. The user can optionally force PSDsoft Express to

assign logic to specific OMCs and data bus bits if desired by using the ‘PROPERTY’

statement in PSDsoft Express. Please see the PSDsoft Express User’s Manual for more

information on OMC assignments.

Loading the OMC flip-flops with data from the 8032 takes priority over the PLD logic

functions. As such, the preset, clear, and clock inputs to the flip-flop can be asynchronously

overridden when the 8032 writes to the csiop registers to load the individual OMCs.

Table 113.

Output macrocell MCELLAB (address = csiop + offset 20h)

Note:

All bits clear to logic ’0’ at power-on reset, but do not clear after warm reset conditions (non-

power-on reset)

Table 114.

Output macrocell MCELLBC (address = csiop + offset 21h)

Note:

All bits clear to logic ’0’ at power-on reset, but do not clear after warm reset conditions (non-

power-on reset)

MCELLBC2

Port B or C2

MCELLBC3

Port B3 or C3

MCELLBC4

Port B4 or C4

MCELLBC5

Port B5

MCELLBC6

Port B6

MCELLBC7

Port B7 orC7

OMC

Port

Assignment(1,2)

Native Product

Terms from AND-

OR Array

Maximum

Borrowed Product

Terms

Data Bit on 8032

Data Bus for

Loading or

Reading OMC

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

MCELLAB7

MCELLAB6

MCELLAB5

MCELLAB4

MCELLAB3

MCELLAB2

MCELLAB1

MCELLAB0

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

MCELLBC7

MCELLBC6

MCELLBC5

MCELLBC4

MCELLBC3

MCELLBC2

MCELLBC1

MCELLBC0

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