UPSD3422 datasheet(267/293 Pages) STMICROELECTRONICS

267 / 293 page

uPSD34xx

DC and AC parameters

267/293

Table 157.

PSD module DC characteristics (with 5V VDD)

Note:

Internal Power-down mode is active.

PLD is in non-Turbo mode, and none of the inputs are switching.

Please see Figure 96 on page 259 for the PLD current calculation.

4IOUT = 0mA

Symbo

Parameter

Test Condition

(in addition to those in

Table 156 on page 265)

Min.

Typ.

Max.

Unit

VIH

Input High Voltage

4.5V < VDD < 5.5V

VDD +0.5

VIL

Input Low Voltage

4.5V < VDD < 5.5V

–0.5

0.8

VLKO

VDD (min) for Flash Erase

and Program

2.5

4.2

VOL

Output Low Voltage

IOL = 20uA, VDD = 4.5V

0.01

0.1

IOL = 8mA, VDD = 4.5V

0.25

0.45

VOH

Output High Voltage

Except VSTBY On

IOH = –20uA, VDD = 4.5V

4.4

4.49

IOH = –2mA, VDD = 4.5V

2.4

3.9

VOH1

Output High Voltage

VSTBY On

IOH1 = 1uA

VSTBY –

0.8

VSTBY SRAM Stand-by Voltage

2.0

VDD

ISTBY

SRAM Stand-by Current

VDD = 0V

0.5

IIDLE

Idle Current (VSTBY input)

VDD > VSTBY

–0.1

0.1

VDF

SRAM Data Retention

Voltage

Only on VSTBY

2VDD – 0.2

ISB

Stand-by Supply Current

for Power-down Mode

CSI > VDD – 0.3V

(Notes 1,2)

120

250

ILI

Input Leakage Current

VSS < VIN < VDD

–1

±0.1

ILO

Output Leakage Current

0.45 < VOUT < VDD

–10

±5

ICC

(DC)

(Note

Operating

Supply

Current

PLD Only

PLD_TURBO = Off,

f = 0MHz (Note 4)

uA/P

PLD_TURBO = On,

f = 0MHz

400

700

uA/P

Flash

memory

During Flash memory

WRITE/Erase Only

Read only, f = 0MHz

SRAM

f = 0MHz

ICC

(AC)

(Note

PLD AC Adder

Note 3

Flash memory AC Adder

1.5

2.5

mA/M

SRAM AC Adder

1.5

3.0

mA/M

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