TMP88CS34FG datasheet(85/215 Pages) TOSHIBA

85 / 215 page

TMP88CS34/CP34

2007-09-12

88CS34-85

2.8.3

Function

The timer/counter 4 has two operating modes: timer, event counter mode.

(1) Timer mode

In this mode, the internal clock is used for counting up. The contents of TC4DR are

compared with the contents of up-counter. If a match is found, an INTTC4 interrupt is

generated and the up-counter is cleared to “0”. Counting up resumes after the up-counter is

cleared.

Table 2.8.1 Source Clock (internal clock) for Timer/Counter 4 (Example: at fc

= 16.0 MHz)

NORMAL, IDLE mode

DV1CK

= 0

DV1CK

= 1

TC4CK

Resolution [

μs]

Maximum setting

time [ms]

Resolution [

μs]

Maximum setting

time [ms]

000

128.0

32.6

256.0

65.3

001

8.0

2.0

16.0

4.1

010

2.0

0.510

4.0

1.0

100

0.5

0.128

1.0

0.255

(2) Event counter mode

In this mode, the TC4 pin input (external clock) pulse is used for counting up. Either the

rising or falling edge can be selected with TC4ES (bit 1 PMPXCR). The contents of TC4DR

are compared with the contents of the up-counter. If a match is found, an INTTC4 interrupt

is generated and the counter is cleared. The maximum applied frequency is shown Table

2.8.2. Two or more machine cycles are required for both the high and low level of the pulse

width.

Note:

The event counter mode can only be used in NORMAL or IDLE mode.

Table 2.8.2 Timer/Counter 4 External Clock Source

Minimum input pulse width [s]

NORMAL1, IDLE1 mode

“H” width

3/fc

“L” width

3/fc

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