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Preliminary Technical Data

Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.

Embedded Processor

ADSP-BF522C/ADSP-BF525C/ADSP-BF527C

Rev. PrB

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

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© 2007 Analog Devices, Inc. All rights reserved.

FEATURES

Up to 600 MHz high-performance Blackfin processor

Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,

40-bit shifter

RISC-like register and instruction model for ease of

programming and compiler-friendly support

Advanced debug, trace, and performance monitoring

1.8V, 2.5V, or 3.3V I/O operation

Embedded low power audio CODEC

289-ball MBGA package

MEMORY

132K bytes of on-chip memory:

48K bytes of instruction SRAM

16K bytes of instruction SRAM/cache

32K bytes of data SRAM

32K bytes of data SRAM/cache

4K bytes of scratchpad SRAM

External memory controller with glueless support for SDRAM

and asynchronous 8-bit and 16-bit memories

Nand flash controller

Flexible booting options from external flash, SPI and TWI

memory or from SPI, TWI, and UART host devices

One-time programmable memory for security

Two dual-channel memory DMA controllers

Memory management unit providing memory protection

PERIPHERALS

Refer to the published ADSP-BF522/ADSP-BF525/ADSP-

BF527 Revision PrB datasheet for additional peripherals

CODEC FEATURES

Stereo 24-bit A/D and D/A converters

DAC

100 dB (A-weighted) signal-to-noise ratio at 3.3 V

95 dB (A-weighted) signal-to-noise ratio at 1.8 V

ADC

90 dB (A-weighted) signal-to-noise ratio at 3.3 V

85dB (A-weighted) signal-to-noise ratio at 1.8 V

Audio sample rates

8 kHz, 44.1 kHz or 88.2 kHz–XTI/MCLK frequency 11.2896

8 kHz, 32 kHz, 48 kHz or 96 kHz–XTI/MCLK frequency

Highly efficient headphone amplifier

Complete stereo/mono or microphone/line interface

Normal and USB modes programmed under software control

Low power

8 mW stereo playback (1.8 V all power supplies)

20 mW record and playback (1.8 V all power supplies))

Low supply voltages

1.8 V to 3.6 V analog supply range

1.8 V to 3.6 V digital supply range

Figure 1. Functional Block Diagram

EMAC/HDMA

UART 0-1

TIMERS 0-7

PPI

NAND

SPI

TWI

SPORT1-0

PORTS

USB

EXTERNAL PORT

FLASH, SDRAM CONTROL

JTAG TEST AND EMULATION

VOLTAGE REGULATOR

DMA

CONTROLLER

L1

INSTRUCTION

MEMORY

L1

DATA

MEMORY

INTERRUPT

CONTROLLER

PERIPHERAL ACCESS

BUS

EXTERNAL ACCESS BUS

DMA CORE BUS

DMA

EXTERNAL

BUS

B

WATCHDOG TIMER

RTC

BOOT

ROM

OTP

16

CODEC