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TB62705CP Datasheet(PDF) 11 Page - Toshiba Semiconductor |
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TB62705CP Datasheet(HTML) 11 Page - Toshiba Semiconductor |
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11 / 17 page ![]() TB62705CP/CF/CFN 2006-06-13 11 [1] Output current (IOUT) IOUT is set by the external resistor (R−EXT), as shown in Fig. 1. [2] Total supply voltage (VLED) This device can operate on 0.4~0.7 V (VO). When a higher voltage is input to the device, the excess voltage is consumed inside the device, which leads to power dissipation. To minimize power dissipation and loss, we recommend that the total supply voltage be set as follows: VLED (total supply voltage) = VCE (Tr Vsat) + Vf (LED forward voltage) + VO (IC supply voltage). When the total supply is too high in the light of the power dissipation of this device, an additional resistor (R) can be used to decrease the supply voltage (VO). PATTERN LAYOUT [3] Pattern layout This device has only one ground pin, i.e., the combined signal ground pin and power ground pin. If the ground pattern layout contains a large amount of inductance and impedance, and the voltage between the ground and LATCH or CLOCK terminals exceeds 2.5 V due to switching noise, the device may not operate correctly. Be sure to pay attention to pattern layout to minimize inductance. OUTn OUTn OUTn OUTn |
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