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ADM1064ASUZ Datasheet(PDF) 9 Page - Analog Devices

Part # ADM1064ASUZ
Description  Super Sequencer with Voltage Readback ADC
PDF  31 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADM1064ASUZ Datasheet(HTML) 9 Page - Analog Devices

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Data Sheet
ADM1064
Rev. E | Page 9 of 31
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE LFCSP HAS AN EXPOSED PAD ON THE BOTTOM.
THIS PAD IS A NO CONNECT (NC). IF POSSIBLE, THIS
PAD SHOULD BE SOLDERED TO THE BOARD FOR
IMPROVED MECHANICAL STABILITY.
ADM1064
TOP VIEW
(Not to Scale)
40
39
38
37
36
35
34
33
32
31
11
12
13
14
15
16
17
18
19
20
VX1 1
VX2 2
VX3 3
VX4 4
VX5 5
VP1 6
VP2 7
VP3 8
VP4 9
VH 10
PDO1
30
PDO2
29
PDO3
28
PDO4
27
PDO5
26
PDO6
25
PDO7
24
PDO8
23
PDO9
22
PDO10
21
PIN 1
INDICATOR
Figure 3. 40-Lead LFCSP Pin Configuration
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
NC 1
VX1 2
VX2 3
VX3 4
VX4 5
VX5 6
VP1 7
VP2 8
VP3 9
VP4 10
VH 11
NC 12
NC
36
PDO1
35
PDO2
34
PDO3
33
PDO4
32
PDO5
31
PDO6
30
PDO7
29
PDO8
28
PDO9
27
PDO10
26
NC
25
ADM1064
TOP VIEW
(Not to Scale)
PIN 1
INDICATOR
Figure 4. 48-Lead TQFP Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
40-Lead
LFCSP
48-Lead
TQFP
15 to 20
1, 12, 13,
18 to 25,
36, 37, 48
NC
No Connect. Do not connect to this pin.
1 to 5
2 to 6
VX1 to VX5
(VXx)
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to
1.375 V. Alternatively, these pins can be used as general-purpose digital inputs.
6 to 9
7 to 10
VP1 to VP4
(VPx)
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to these pins, the output of which connects to a supply
fault detector. These pins allow thresholds from 2.5 V to 6.0 V, from 1.25 V to 3.00 V, and from 0.573 V
to 1.375 V.
10
11
VH
High Voltage Input to Supply Fault Detectors. Two input ranges can be set by altering the input
attenuation on a potential divider connected to this pin, the output of which connects to a supply
fault detector. This pin allows thresholds from 6.0 V to 14.4 V and from 2.5 V to 6.0 V.
11
14
AGND1
Ground Return for Input Attenuators.
12
15
REFGND
Ground Return for On-Chip Reference Circuits.
13
16
REFIN
Reference Input for ADC. Nominally, 2.048 V. This pin must be driven by a reference voltage.
The on-board reference can be used by connecting the REFOUT pin to the REFIN pin.
14
17
REFOUT1
Reference Output, 2.048 V. Typically connected to REFIN. Note that the capacitor must be connected
between this pin and REFGND. A 10 μF capacitor is recommended for this purpose.
21 to 30
26 to 35
PDO10 to
PDO1
Programmable Output Drivers.
31
38
PDOGND1
Ground Return for Output Drivers.
32
39
VCCP
Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this pin
and GND. A 10 μF capacitor is recommended for this purpose.
33
40
A0
Logic Input. This pin sets the seventh bit of the SMBus interface address.
34
41
A1
Logic Input. This pin sets the sixth bit of the SMBus interface address.
35
42
SCL
SMBus Clock Pin. Bidirectional open drain requires external resistive pull-up.
36
43
SDA
SMBus Data Pin. Bidirectional open drain requires external resistive pull-up.
37
44
AUX2
Auxiliary, Single-Ended ADC Input.



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