TDA7410ND datasheet(24/34 Pages) STMICROELECTRONICS

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I2C bus specification

TDA7410ND

24/34

I2C bus specification

8.1

Interface protocol

The interface protocol comprises:

●

a start condition (S)

●

a chip address byte (the LSB determines read/write transmission)

●

a subaddress byte

●

a sequence of data (N-bytes + acknowledge)

●

a stop condition (P)

●

the max. clock speed is 500kbits/s

Table 8.

Receive mode

S = Start

R/W =

"0" -> Receive Mode (Chip could be programmed by

μP)

"1" -> Transmission Mode (Data could be received by

μP)

ACK = Acknowledge

P = Stop

TS = Testing mode

AZ = Auto zero remain

AI = Auto increment

Table 9.

Transmission mode

ST = Stereo

X = Not Used

The transmitted data is automatic updated after each ACK. Transmission can be repeated

without new chip address.

8.2

Reset condition

A Power-On-Reset is invoked if the Supply-Voltage is below than 3.5V. After that the

following data is written automatically into the registers of all subaddresses:

R/W

ACK

A3A2A1A0

ACK

DATA

ACK P

R/W

ACK

Table 10.

Reset condition

MSB

LSB

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