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74VHCT16374A Datasheet(PDF) 1 Page - STMicroelectronics |
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74VHCT16374A Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 10 page  1/10 February 2003 s HIGH SPEED: fMAX = 185 MHz (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =4 µA (MAX.) at TA=25°C s COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN.) VIL = 0.8 (MAX.) s POWER DOWN PROTECTION ON INPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|= IOL =8 mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16374 s IMPROVED LATCH-UP IMMUNITY s LOW NOISE: VOLP = 0.9V (MAX.) DESCRIPTION The 74VHCT16374A is an advanced high-speed CMOS 16 D-TYPE FLIP FLOP with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. These 16 bit D-TYPE flip-flop is controlled by two clock inputs (CK) and two output enable inputs (nOE). The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock, the Q outputs will be set to the logic state that were setup at the D inputs. While the (OE) input is low, the outputs will be in a normal logic state (high or low logic level); while OE is high, the outputs will be in a high impedance state. The output control does not affect the internal op- eration of flip-flops; that is, the old data can be re- tained or the new data can be entered even while the outputs are off. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protec- tion circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74VHCT16374A 16-BIT D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS NON INVERTING ORDER CODES PACKAGE TUBE T & R TSSOP 74VHCT16374ATTR TSSOP PIN CONNECTION Obsolete Product(s) - Obsolete Product(s) |
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