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STM32G474CB Datasheet(PDF) 44 Page - STMicroelectronics |
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STM32G474CB Datasheet(HTML) 44 Page - STMicroelectronics |
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44 / 232 page  Functional overview STM32G474xB STM32G474xC STM32G474xE 44/232 DS12288 Rev 1 3.33 Controller area network (FDCAN1, FDCAN2, FDCAN3) The controller area network (CAN) subsystem consists of three CAN modules and a shared message RAM memory. The three CAN modules (FDCAN1, FDCAN2 and FDCAN3) are compliant with ISO 11898-1 (CAN protocol specification version 2.0 part A, B) and CAN FD protocol specification version 1.0. A 3-Kbyte message RAM memory implements filters, receive FIFOs, receive buffers, transmit event FIFOs, transmit buffers. This message RAM is shared between the three FDCAN modules. 3.34 Universal serial bus (USB) The STM32G474xB/xC/xE devices embed a full-speed USB device peripheral compliant with the USB specification version 2.0. The internal USB PHY supports USB FS signaling, embedded DP pull-up and also battery charging detection according to Battery Charging Specification Revision 1.2. The USB interface implements a full-speed (12 Mbit/s) function interface with added support for USB 2.0 Link Power Management. It has software- configurable endpoint setting with packet memory up-to 1 Kbyte and suspend/resume support. It requires a precise 48 MHz clock which can be generated from the internal main PLL (the clock source must use a HSE crystal oscillator) or by the internal 48 MHz oscillator in automatic trimming mode. The synchronization for this oscillator can be taken from the USB data stream itself (SOF signalization) which allows crystal less operation. 3.35 USB Type-C™ / USB Power Delivery controller (UCPD) The device embeds one controller (UCPD) compliant with USB Type-C Rev. 1.2 and USB Power Delivery Rev. 3.0 specifications. The controller uses specific I/Os supporting the USB Type-C and USB Power Delivery requirements, featuring: • USB Type-C pull-up (Rp, all values) and pull-down (Rd) resistors • “Dead battery” support • USB Power Delivery message transmission and reception • FRS (fast role swap) support The digital controller handles notably: • USB Type-C level detection with de-bounce, generating interrupts • FRS detection, generating an interrupt • Byte-level interface for USB Power Delivery payload, generating interrupts (DMA compatible) • USB Power Delivery timing dividers (including a clock pre-scaler) • CRC generation/checking • 4b5b encode/decode • Ordered sets (with a programmable ordered set mask at receive) • Frequency recovery in receiver during preamble |
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