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F1953 Datasheet(PDF) 5 Page - Renesas Technology Corp

Part # F1953
Description  6-bit Digital Step Attenuator 400 to 4000 MHz
PDF  19 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

F1953 Datasheet(HTML) 5 Page - Renesas Technology Corp

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F1953 Datasheet
© 2022 Renesas Electronics Corporation
5
February 9, 2022
PARALLEL CONTROL MODE
The user has the option of running in one of two parallel modes: Direct Parallel Mode or Latched Parallel
Mode.
DIRECT-PARALLEL MODE:
Direct-parallel mode is selected when VMODE (pin 13) is < VIL and LE (pin 5) is > VIH. In this mode the
device will immediately react to any voltage changes to the parallel control pins [pins 1, 15, 16, 17, 19, 20].
Use direct-parallel mode for the fastest settling time.
LATCHED-PARALLEL MODE:
Latched-parallel mode is selected when VMODE (pin 13) is < VIL and LE (pin 5) is toggled from < VIL to > VIH
To utilize latched-parallel mode:
Set LE < VIL
Adjust pins [1, 15, 16, 17, 19, 20] to the desired attenuation setting. (Note the device will not react
to these pins while LE < VIL.)
Pull LE > VIH. The device will then transition to the attenuation settings reflected by these pins.
When the device is powered up In Latched Parallel Mode [VMODE < VIL and LE > VIH] the attenuation setting
defaults to the state defined by the six parallel data pins [pins 1, 15, 16, 17, 19, 20]
LATCHED PARALLEL MODE TIMING DIAGRAM: (Note the Timing Spec Intervals in Blue)
LATCHED PARALLEL MODE TIMING TABLE:
Interval
Symbol
Description
Min
Spec
Max
Spec
Units
A
Serial to Parallel Mode Setup Time
100
ns
B
Parallel Data Hold Time
10
ns
C
LE minimum pulse width
10
ns
D
Parallel Data Setup Time
10
ns
D[5:0]
Data Word
Latched into
Active Register
LE
VMODE
Spec
Interval
A
D
C
B



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