Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

93C46BXTE/MC Datasheet(PDF) 10 Page - Microchip Technology

Part # 93C46BXTE/MC
Description  1K Microwire Compatible Serial EEPROM
PDF  30 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

93C46BXTE/MC Datasheet(HTML) 10 Page - Microchip Technology

Back Button 93C46BXTE/MC Datasheet HTML 6Page - Microchip Technology 93C46BXTE/MC Datasheet HTML 7Page - Microchip Technology 93C46BXTE/MC Datasheet HTML 8Page - Microchip Technology 93C46BXTE/MC Datasheet HTML 9Page - Microchip Technology 93C46BXTE/MC Datasheet HTML 10Page - Microchip Technology 93C46BXTE/MC Datasheet HTML 11Page - Microchip Technology 93C46BXTE/MC Datasheet HTML 12Page - Microchip Technology 93C46BXTE/MC Datasheet HTML 13Page - Microchip Technology 93C46BXTE/MC Datasheet HTML 14Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 30 page
background image
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
DS21749G-page 10
© 2008 Microchip Technology Inc.
2.8
Write
The WRITE instruction is followed by 8 bits (if ORG is
low or A-version devices) or 16 bits (if ORG pin is high
or B-version devices) of data, which are written into the
specified address. For 93AA46A/B/C and 93LC46A/B/C
devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase and
programming cycle. For 93C46A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
FIGURE 2-8:
WRITE TIMING FOR 93AA AND 93LC DEVICES
FIGURE 2-9:
WRITE TIMING FOR 93C DEVICES
Note:
After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/Busy status from DO.
CS
CLK
DI
DO
1
0
1
AN
•••
A0
Dx
•••
D0
Busy
Ready
High-Z
High-Z
TWC
TCSL
TCZ
TSV
CS
CLK
DI
DO
1
0
1
AN
•••
A0
Dx
•••
D0
Busy
Ready
High-Z
High-Z
TWC
TCSL
TCZ
TSV



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com