OUT+

OUT-

DS15BA101

IN+

IN-

50:

50:

100: Differential T-Line

LVPECL

100:

OUT+

OUT-

DS15BA101

IN+

IN-

50:

50:

VCC

CML3.3V or CML2.5V

100:

100: Differential T-Line

OUT+

OUT-

DS15BA101

IN+

IN-

100:

100: Differential T-Line

LVDS

DS15BA101

SNLS234J – OCTOBER 2006 – REVISED APRIL 2013

www.ti.com

DEVICE OPERATION

INPUT INTERFACING

The DS15BA101 accepts either differential or single-ended input. The inputs are self-biased, allowing for simple

AC or DC coupling. DC-coupled inputs must be kept within the specified common-mode range. The IN+ and IN-

pins are self-biased at approximately 2.1V with VCC = 3.3V. The following three figures illustrate typical DC-

coupled interface to common differential drivers.

Figure 2. Typical LVDS Driver DC-Coupled Interface to DS15BA101 Input

Figure 3. Typical CML Driver DC-Coupled Interface to DS15BA101 Input

Figure 4. Typical LVPECL Driver DC-Coupled Interface to DS15BA101 Input

OUTPUT INTERFACING

The DS15BA101 uses current mode outputs. Single-ended output levels are 400 mVP-P into AC-coupled 100Ω

differential cable (with RVO = 953Ω) or into AC-coupled 50Ω coaxial cable (with RVO = 487Ω). Output level is

controlled by the value of the RVO resistor connected between the RVO and VCC.

The RVO resistor should be placed as close as possible to the RVO pin. In addition, the copper in the plane layers

below the RVO network should be removed to minimize parasitic capacitance. The following figure illustrates

typical DC-coupled interface to common differential receivers and assumes that the receivers have high

impedance inputs. While most receivers have a common mode input range that can accomodate CML signals, it

is recommended to check respective receiver's datasheet prior to implementing the suggested interface

implementation.

4

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