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8V97053L Datasheet(PDF) 39 Page - Renesas Technology Corp |
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8V97053L Datasheet(HTML) 39 Page - Renesas Technology Corp |
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39 / 66 page ![]() 39 ©2016–2023 Renesas Electronics Corporation. February 2, 2023 8V97053L Datasheet Table 11K. Register 6: 2-Bit VCO Band Selection Accuracy Configuration. Function Description Name Description Factory Default Function band_select_acc[2:1] BAND_SELECT_ACC 00 00 = 1 cycle of the band select clock (output of the Band Select Divider) 01 = 2 cycles 10 = 4 cycles 11 = Reserved Table 11N. Register 6: 4-Bit Extra Most Significant Bits of Band Select Divider. Function Description1 2 Name Description Factory Default Value Function ExtBndSelDiv[4:1] EXT_BND_SEL_DIV 0000 BSCC_R4 + [EXT_BND_SEL_DIV]x256 0000 = [BSCC_R4] 0001 =[BSCC_R4]+256 0010 = [BSCC_R4] + 512 ….… 1111 = [BSCC_R4]+3840 NOTE 1. EXT_BND_SEL_DIV are Extra 4 MSBs that extend the Band Select Clock Counter in Register 4. These additional bits are necessary for band selection to divide down to <500kHz when high PFD frequencies are used. NOTE 2. BSCC_R4 is the BAND SELECT CLOCK COUNTER value in Register 4. Table 11O. Register 6: 3-Bit Control Bits. Function Description1 Name Description Function CB[3:1] CONTROL BITS 110 = Register 6 is programmed NOTE 1. The user has to set CB[3:1] to 110 in order to write to Register 6. |
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