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STM32F071C8U6 Datasheet(PDF) 55 Page - STMicroelectronics |
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STM32F071C8U6 Datasheet(HTML) 55 Page - STMicroelectronics |
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55 / 121 page ![]() DocID025451 Rev 3 55/121 STM32F071CB STM32F071RB STM32F071VB STM32F071V8 Electrical characteristics 96 IDD HSI48 48 MHz 23.1 25.4 25.8 26.6 12.8 13.5 13.7 13.9 mA HSE bypass, PLL on 48 MHz 23.0 25.3(2) 25.7 26.5(2) 12.6 13.3(2) 13.5 13.8(2) 32 MHz 15.4 17.3 17.8 18.3 7.96 8.92 9.17 9.73 24 MHz 11.4 12.9 13.5 13.7 6.48 8.04 8.23 8.41 HSE bypass, PLL off 8 MHz 4.21 4.6 4.89 5.25 2.07 2.3 2.35 2.94 1 MHz 0.78 0.9 0.92 1.15 0.36 0.48 0.59 0.82 HSI clock, PLL on 48 MHz 23.1 24.5 25.0 25.2 12.6 13.7 13.9 14.0 32 MHz 15.4 17.4 17.7 18.2 8.05 8.85 9.16 9.94 24 MHz 11.5 13.0 13.6 13.9 6.49 8.06 8.21 8.47 HSI clock, PLL off 8 MHz 4.34 4.75 5.03 5.41 2.11 2.36 2.38 2.98 HSI48 48 MHz 15.1 16.6 16.8 17.5 3.08 3.43 3.56 3.61 HSE bypass, PLL on 48 MHz 15.0 16.5(2) 16.7 17.3(2) 2.93 3.28(2) 3.41 3.46(2) 32 MHz 9.9 11.4 11.6 11.9 2.0 2.24 2.32 2.49 24 MHz 7.43 8.17 8.71 8.82 1.63 1.82 1.88 1.9 HSE bypass, PLL off 8 MHz 2.83 3.09 3.26 3.66 0.76 0.88 0.91 0.93 1 MHz 0.42 0.54 0.55 0.67 0.28 0.39 0.41 0.43 HSI clock, PLL on 48 MHz 15.0 17.2 17.3 17.9 3.04 3.37 3.41 3.46 32 MHz 9.93 11.3 11.6 11.7 2.11 2.35 2.44 2.65 24 MHz 7.53 8.45 8.87 8.95 1.64 1.83 1.9 1.93 HSI clock, PLL off 8 MHz 2.95 3.24 3.41 3.8 0.8 0.92 0.94 0.97 1. Data based on characterization results, not tested in production unless otherwise specified. 2. Data based on characterization results and tested in production (using one common test limit for sum of IDD and IDDA). Table 28. Typical and maximum current consumption from VDD supply at VDD = 3.6 V (continued) Conditions fHCLK All peripherals enabled All peripherals disabled Unit Typ Max @ TA(1) Typ Max @ TA(1) 25 °C 85 °C 105 °C 25 °C 85 °C 105 °C |
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