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74AC163 Datasheet(PDF) 1 Page - STMicroelectronics |
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74AC163 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 12 page  74AC163 SYNCHRONOUS PRESETTABLE 4-BIT COUNTER December 1998 s HIGH SPEED: fMAX =200 MHz (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =4 µA (MAX.) at TA =25 oC s HIGH NOISE IMMUNITY: VNIH =VNIL =28% VCC (MIN.) s 50 Ω TRANSMISSION LINE DRIVING CAPABILITY s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|=IOL = 24 mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 163 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The AC163 is a high-speed CMOS SYNCRONOUS PRESETTABLE COUNTERS fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. It is ideal for low power applications mantaining high speed operation similar to eqivalent Bipolar Schottky TTL. It is a 4 bit binary counter with Synchronous Clear. The circuits have four fundamental modes of operation, in order of preference: synchronous reset, parallel load, count-up and hold. Four control inputs, Master Reset (CLEAR), Parallel Enable Input (LOAD), Count Enable Input (PE) and Count Enable Carry Input (TE), determine the mode of operation as shown in the Truth Table. A LOW signal on CLEAR overrides counting and parallel loading and allows all output to go LOW on the next rising edge of CLOCK. A LOW signal on LOAD overrides counting and allows information on Parallel Data Qn inputs to be loaded into the flip-flops on the next rising edge of CLOCK. With LOAD and CLEAR, PE and TE permit counting when both are HIGH. Conversely, a LOW signal on either PE and TE inhibits counting. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS M (Micro Package) B (Plastic Package) ORDER CODES : 74AC163B 74AC163M ® 1/12 |
Similar Part No. - 74AC163 |
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Similar Description - 74AC163 |
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