LM25115A

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SNVS501B – FEBRUARY 2007 – REVISED APRIL 2013

Thermal Protection

Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event the maximum junction

temperature limit is exceeded. When activated, typically at 165 degrees Celsius, the controller is forced into a low

power standby state with the output drivers and the bias regulator disabled. The device will restart when the

junction temperature falls below the thermal shutdown hysteresis, which is typically 25 degrees. The thermal

protection feature is provided to prevent catastrophic failures from accidental device overheating.

Standalone DC/DC Synchronous Buck Mode

The LM25115A can be configured as a standalone DC/DC synchronous buck controller. In this mode the

LM25115A uses leading edge modulation in conjunction with valley current mode control to control the

synchronous buck power stage. The internal oscillator within the LM25115A sets the clock frequency for the high

and low-side drivers of the external synchronous buck power MOSFETs . The clock frequency in the

synchronous buck mode is programmed by the SYNC pin resistor and RAMP pin capacitor. Connecting a

resistor between a dc bias supply and the SYNC pin produces a current, ISYNC, which sets the charging current of

the RAMP pin capacitor. The RAMP capacitor is charged until its voltage reaches the peak ramp threshold of

2.25V. The RAMP capacitor is then discharged for 300ns before beginning a new PWM cycle. The 300ns reset

time of the RAMP pin sets the minimum off-time of the PWM controller in this mode. The internal clock frequency

in the synchronous buck mode is set by ISYNC, the ramp capacitor, the peak ramp threshold, and the 300ns

deadtime.

FCLK ≊ 1 / ((CRAMP x 2.25V) / (ISYNC x 3) + 300ns)

See the LM5115 dc evaluation board application note (AN-1367, literature number SNVA106) for more details on

the synchronous buck mode. Please note that LM25115A is similar to LM5115 except for the tracking feature.

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