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SLG46867M Datasheet(PDF) 50 Page - Renesas Technology Corp |
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SLG46867M Datasheet(HTML) 50 Page - Renesas Technology Corp |
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50 / 209 page ![]() Datasheet 5-Feb-2024 CFR0011-120-00 Revision 3.22 Page 50 of 208 © 2024 Renesas Electronics Corporation SLG46867 GreenPAK Programmable Mixed-Signal Matrix with Dual 44 m /2 A P-FET 7.1.1 2-Bit LUT or D Flip-Flop Macrocell Used as 2-Bit LUT This macrocell, when programmed for a LUT function, uses a 4-bit register to define their output function: 2-Bit LUT0 is defined by registers [1499:1496] 2-Bit LUT1 is defined by registers [1503:1500] 2-Bit LUT2 is defined by registers [1507:1504] Table 28 shows the register bits for the standard digital logic devices (AND, NAND, OR, NOR, XOR, XNOR) that can be created within each of the 2-bit LUT logic cells. Table 28: 2-bit LUT Standard Digital Functions Function MSB LSB AND-2 1000 NAND-2 0111 OR-2 1110 NOR-2 0001 XOR-2 0110 XNOR-2 1001 Table 25: 2-bit LUT0 Truth Table IN1 IN0 OUT 0 0 register [1496] LSB 0 1 register [1497] 1 0 register [1498] 1 1 register [1499] MSB Table 26: 2-bit LUT1 Truth Table IN1 IN0 OUT 0 0 register [1500] LSB 0 1 register [1501] 1 0 register [1502] 1 1 register [1503] MSB Table 27: 2-bit LUT2 Truth Table IN1 IN0 OUT 0 0 register [1504] LSB 0 1 register [1505] 1 0 register [1506] 1 1 register [1507] MSB |
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