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P9511RQGJ Datasheet(PDF) 7 Page - uPI Group Inc.

Part # P9511RQGJ
Description  8/7/6/5/4/3/2/1-Phase Synchronous-Rectified Buck Controller for Next Generation GPU Core Power
PDF  19 Pages
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Manufacturer  UPI [uPI Group Inc.]
Direct Link  http://www.ubiq-semi.com/
Logo UPI - uPI Group Inc.

P9511RQGJ Datasheet(HTML) 7 Page - uPI Group Inc.

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uP9511R
7
uP9511R-DS-F0000, Oct. 2017
www.upi-semi.com
()
IMON
SUM
DC
Hys
OUT
BOT
TOP
Hys
PROGx
R
R
N
R
I
R
R
uA
V
×
⎟⎟
⎟
⎟
⎠
⎞
⎜⎜
⎜
⎜
⎝
⎛
×
=
×
=
_
_
||
10
Where R
TOP is the resistor connects from 5VCC to PROGX
pin, and R
BOT is the resistor connects from PROGX pin to
GND.
If V
IMON < VPROG1, uP9511R operates in single phase; if VPROG1
< V
IMON < VPROG2, uP9511R operates in dual phase; if VPROG2
< V
IMON < VPROG3, uP9511R operates in four phase; if VPROG3
< V
IMON < VPROG4, uP9511R operates in six phase; if VIMON >
V
PROG4, uP9511R operates in 8 phase. The uP9511R always
keeps all-of-phase interleaved operation. When setting
PROG1, PROG2, PROG3 and PROG4, always keep
V
PROG1 <VPROG2<VPROG3<VPROG4. Violating this rule may
lead to unknown status and should be avoided. Short
the PROG1, PROG2, PROG3 and PROG4 to GND to
disable the auto-phase mode.
Cold Boot and Warm Boot
The uP9511R features programmable operation phase
number of Cold Boot Mode and Warm Boot Mode. When
PSI=Low and uP9511R first boots up (first time of 5VCC
and EN goes high), controller will enter to Cold Boot Mode.
Except the first boot up, when PSI=Low state and controller
power up by EN control, then uP9511R will enter to Warm
Boot Mode. Connect LPC pin to 5VCC with a voltage divider
(Figure 3) to set the operation phase number of Cold Boot
Mode and Warm Boot Mode. Figure 4 shows all the power
states of uP9511R under each combination of 5VCC/EN/
PSI/VID signal. Table 3 shows the recommended resistance
of the voltage divider.
LPC
Low Phase
Mode
5VCC
R1
R2
Figure 3. Circuit of LPC Setting
Functional Description
Table 3. Recommended resistance of Cold Boot mode and Warm Boot mode
V
C
P
L
f
o
%
=
C
C
V
5
e
s
a
h
P
t
o
o
B
d
l
o
C
t
n
u
o
C
k
(
t
n
u
o
C
e
s
a
h
P
t
o
o
B
m
r
a
W
Ω)
e
s
a
h
p
-
1e
s
a
h
p
-
2e
s
a
h
p
-
3e
s
a
h
p
-
4e
s
a
h
p
-
5
1
R2
R1
R2
R1
R2
R1
R2
R1
R2
R
%
3
6
.
0
4e
s
a
h
p
-
12
9
.
47
3
.
31
6
.
4
24
8
.
6
13
.
4
42
3
.
0
34
8
.
3
73
5
.
0
57
6
.
7
4
16
0
.
1
0
1
%
8
8
.
6
4e
s
a
h
p
-
27
2
.
47
7
.
33
3
.
1
23
8
.
8
14
.
8
39
8
.
3
39
9
.
3
68
4
.
6
59
9
.
7
2
15
9
.
2
1
1
%
3
1
.
3
5e
s
a
h
p
-
36
7
.
37
2
.
42
8
.
8
14
3
.
1
28
8
.
3
34
.
8
37
4
.
6
51
0
.
4
63
9
.
2
1
1
1
0
.
8
2
1
%
8
3
.
9
5e
s
a
h
p
-
47
3
.
32
9
.
44
8
.
6
12
6
.
4
21
3
.
0
31
3
.
4
42
5
.
0
56
8
.
3
74
0
.
1
0
1
1
7
.
7
4
1
%
3
6
.
5
6e
s
a
h
p
-
55
0
.
32
8
.
54
2
.
5
11
.
9
23
4
.
7
27
3
.
2
51
7
.
5
49
2
.
7
82
4
.
1
97
5
.
4
7
1
%
8
8
.
1
7e
s
a
h
p
-
68
7
.
21
1
.
71
9
.
3
16
5
.
5
34
0
.
5
21
0
.
4
64
7
.
1
49
6
.
6
0
17
4
.
3
87
3
.
3
1
2
%
3
1
.
8
7e
s
a
h
p
-
76
5
.
24
1
.
98
.
2
12
7
.
5
44
0
.
3
23
.
2
84
.
8
37
1
.
7
3
18
.
6
75
3
.
4
7
2
%
8
3
.
4
8e
s
a
h
p
-
87
3
.
28
.
2
15
8
.
1
12
0
.
4
63
3
.
1
24
2
.
5
1
15
5
.
5
36
0
.
2
9
11
1
.
1
72
1
.
4
8
3
Figure 4. Power States of uP9511R
OFF
Full-Phase
Cold-Boot
OFF
Warm-Boot
Full-Phase
Warm-Boot
OFF
Cold-Boot
Full-Phase
Auto-Phase
5VCC
EN
PSI
VID
High
Tri-state
Low



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