LMH6628

SNOSA02D – MAY 2002 – REVISED MARCH 2013

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Care must be given to layout and component placement to maintain a high frequency common-mode rejection.

The plot of Figure 31 shows the simultaneous reception of signals transmitted at 1MHz and 10MHz.

Figure 31. Simultaneous Reception of Signals Transmitted at 1MHz and 10MHz

POSITIVE PEAK DETECTOR

The LMH6628's dual amplifiers can be used to implement a unity-gain peak detector circuit as shown in

Figure 32.

Figure 32. LMH6628's Dual Amplifiers Used to Implement a Unity-Gain Peak Detector Circuit

The acquisition speed of this circuit is limited by the dynamic resistance of the diode when charging Chold. A plot

of the circuit's performance is shown in Figure 33 with a 1MHz sinusoidal input.

Figure 33. Circuit's Performance With a 1MHz Sinusoidal Input

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