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LMK61PD0A2 Datasheet(PDF) 4 Page - Texas Instruments |
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LMK61PD0A2 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 27 page ![]() OS OUTN VDD OE GND OUTP FS0 FS1 1 6 2 5 4 3 7 8 LMK61PD0A2 SNAS675A – OCTOBER 2015 – REVISED NOVEMBER 2015 www.ti.com 6 Pin Configuration and Functions SIA Package 8 pin QFM Table 3. Pin Functions PIN I/O DESCRIPTION NAME NO. POWER GND 3 Ground Device Ground. VDD 6 Analog 3.3 V Power Supply. OUTPUT BLOCK OUTP, 4, 5 Universal Differential Output Pair (LVPECL, LVDS or HCSL). OUTN DIGITAL CONTROL / INTERFACES FS[1:0] 7, 8 LVCMOS Output Frequency Select. Refer toTable 1. OE 1 LVCMOS Output Enable (internal pullup). Refer toTable 2. OS 3 LVCMOS Output Type Select. Refer toTable 2. 4 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: LMK61PD0A2 |
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