PCM3501ESLASH2K datasheet(23/29 Pages) TI2

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PCM3501

ANTI-ALIASING FILTER

STOPBAND CHARACTERISTICS

Frequency (Hz)

–5

–10

–15

–20

–25

–30

–35

–40

–45

–50

100

10k

100k

10M

ANTI-ALIASING FILTER

PASSBAND CHARACTERISTICS

Frequency (Hz)

–0.1

–0.2

–0.3

–0.4

–0.5

–0.6

–0.7

–0.8

–0.9

–1.0

100

10k

100k

The AFE circuit consists of a buffer/filter for each input of

the converter. The frequency response for the filter is shown

in Figure 22. Since the delta-sigma modulator oversamples

the input at 64fS, the anti-alias filter requirements are re-

laxed, with only a single-pole filter being required. If an

application requires further band limiting of the input signal,

a simple RC filter at the inputs can be used, as shown in

Figure 23.

FIGURE 22. Anti-Alias Filter Frequency Response.

FIGURE 23. Optional External Low-Pass Filter for the

ADC.

THEORY OF OPERATION

ADC SECTION

The PCM3501 A/D converter consists of two reference

circuits, differential input buffer, a fully differential 5th-

order delta-sigma modulator, a decimation filter (including

digital high pass), and a serial interface circuit. The block

diagram on the front page of this data sheet illustrates the

architecture of the ADC section, Figure 21 shows the input

buffers, and Figure 24 illustrates the architecture of the 5th-

order delta-sigma modulator and transfer functions.

An internal reference circuit with three external capacitors

provides all reference voltages which are required by the

ADC, which defines the full-scale range for the converter.

The internal input buffers save the design, space and extra

parts needed for external circuitry required by many delta-

sigma converters. The internal full-differential signal pro-

cessing architecture provides a wide dynamic range and

excellent power supply rejection performance. The input

signal is sampled at a 64x oversampling rate, eliminating

the need for a sample-and-hold circuit, and simplifying anti-

alias filtering requirements. The 5th-order delta-sigma noise

–

5th SW-CAP

Integrator

4th SW-CAP

Integrator

3rd SW-CAP

Integrator

2nd SW-CAP

Integrator

1st SW-CAP

Integrator

–

1-Bit

DAC

H(z)

Qn(z)

Analog In

X(z)

Digital Out

Y(z)

Y(z) = STF(z) • X(z) + NTF(z) • Qn(z)

Signal Transfer Function

Noise Transfer Function

STF(z) = H(z) / [1 + H(z)]

NTF(z) = 1/ [1 + H(z)]

Comparator

FIGURE 24. Simplified 5th-Order Delta-Sigma Modulator.

IN+

PCM3501

Analog

Input

–3dB =

π RC

IN–

PCM3501E/2K Datasheet(PDF) 23 Page - Texas Instruments

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