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SN65EPT23D/DR Datasheet(PDF) 2 Page - Texas Instruments |
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SN65EPT23D/DR Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 19 page ![]() SN65EPT23 SLLS969A – NOVEMBER 2009 – REVISED JANUARY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ABSOLUTE MAXIMUM RATINGS PARAMETER CONDITION VALUE UNIT Absolute supply voltage, VCC GND = 0V 3.8 V Absolute input voltage, VI GND = 0 and Vi ≤ VCC 0 to 3.8 V Continuous 50 Output current mA Surge 100 Operating temperature range –40 to 85 °C Storage temperature range –65 to 150 °C POWER DISSIPATION RATINGS POWER RATING THERMAL RESISTANCE, DERATING FACTOR POWER RATING CIRCUIT BOARD JUNCTION TO AMBIENT PACKAGE TA < 25°C TA > 25°C TA = 85°C MODEL NO AIRFLOW (mW) (mW/ °C) (mW) SOIC Low-K 719 139 7 288 High-K 840 119 8 336 MSOP Low-K 469 213 5 188 High-K 527 189 5 211 THERMAL CHARACTERISTICS PARAMETER PACKAGE VALUE UNIT qJB Junction-to Board Thermal Resistance SOIC 79 °C/W MSOP 120 qJC Junction-to Case Thermal Resistance SOIC 98 °C/W MSOP 74 KEY ATTRIBUTES CHARACTERISTICS VALUE Moisture sensitivity level Level 1 Flammability rating (Oxygen Index: 28 to 34) UL 94 V-0 at 0.125 in ESD-HBM 2 kV ESD-machine model 200 V ESD-charge device model 2 kV Internal pull down resistor 50 k Ω Internal pull up resistor 50 k Ω Meets or exceeds JEDEC Spec EIA/JESD78 latchup test 2 Submit Documentation Feedback © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): SN65EPT23 |
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