| Electronic Components Datasheet Search |
|
SII1161 Datasheet(PDF) 21 Page - Silicon image |
|
|
|||||||||||||||||||||||||||||
SII1161 Datasheet(HTML) 21 Page - Silicon image |
|
21 / 46 page SiI 1161 PanelLink Receiver Data Sheet 17 SiI-DS-0096-D T PDL QE[23:0], QO[23:0], DE, CTL[3:1], VSYNC, HSYNC PD# V IL Figure 13. Output Signals Disabled Timing from PD# Active Figure 14. SCDT Timing from DE Inactive or Active ODCK DE QE[23:0] QO[23:0] FIRST EVEN DATA SECOND EVEN DATA Internal ODCK * 2 FIRST ODD DATA SECOND ODD DATA T ST Figure 15. Two Pixels per Clock Staggered Output Timing Diagram DE SCDT DE SCDT T HSC T FSC |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |