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SN74LVC2G32DCUT Datasheet(PDF) 9 Page - Texas Instruments |
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SN74LVC2G32DCUT Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 26 page ![]() 1 2 7 1A 1B 1Y 5 6 3 2A 2B 2Y SN74LVC2G32 www.ti.com SCES201N – APRIL 1999 – REVISED SEPTEMBER 2015 8 Detailed Description 8.1 Overview The SN74LVC2G32 provides two logical OR gates per device and each gate has two inputs. Both input paths use identical circuitry for matching propagation delays. Supply voltage from 1.65 V to 5.5 V is supported. 8.2 Functional Block Diagram Figure 3. Logic Diagram (Positive Logic) 8.3 Feature Description The SN74LVC2G32 inputs per gate can accept up to 5.5 V regardless of VCC. 8.4 Device Functional Modes Table 1 lists the functional modes for the SN74LVC2G32. Table 1. Function Table (Each Gate)(1) INPUTS OUTPUT Y A B H X H X H H L L L (1) Y = A + B in positive logic. Copyright © 1999–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: SN74LVC2G32 |
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