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PIC16LF1713 Datasheet(PDF) 39 Page - Microchip Technology |
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PIC16LF1713 Datasheet(HTML) 39 Page - Microchip Technology |
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39 / 483 page  2014-2015 Microchip Technology Inc. DS40001740B-page 39 PIC16(L)F1717/8/9 TABLE 3-12: SPECIAL FUNCTION REGISTER SUMMARY Addr. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets Bank 0 00Ch PORTA RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 xxxx xxxx uuuu uuuu 00Dh PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 xxxx xxxx uuuu uuuu 00Eh PORTC RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0 xxxx xxxx uuuu uuuu 00Fh PORTD(1) RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 xxxx xxxx uuuu uuuu 010h PORTE — — — — RE3 RE2(1) RE1(1) RE0(1) ---- xxxx ---- uuuu 011h PIR1 TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0-00 012h PIR2 OSFIF C2IF C1IF — BCL1IF TMR6IF TMR4IF CCP2IF 000- 0000 000- 00-- 013h PIR3 — NCOIF COGIF ZCDIF CLC4IF CLC3IF CLC2IF CLC1IF -000 0000 --00 -000 014h — Unimplemented — — 015h TMR0 Timer0 Module Register xxxx xxxx uuuu uuuu 016h TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu 017h TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu 018h T1CON TMR1CS<1:0> T1CKPS<1:0> T1OSCEN T1SYNC —TMR1ON 0000 00-0 uuuu uu-u 019h T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/ DONE T1GVAL T1GSS<1:0> 0000 0x00 uuuu uxuu 01Ah TMR2 Holding Register for the 8-bit TMR2 Register 0000 0000 uuuu uuuu 01Bh PR2 Timer2 Period Register 1111 1111 uuuu uuuu 01Ch T2CON — T2OUTPS<3:0> TMR2ON T2CKPS<1:0> -000 0000 -000 0000 01Dh to 01Fh — Unimplemented — — Bank 1 08Ch TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 1111 1111 1111 1111 08Dh TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISA0 1111 1111 1111 1111 08Eh TRISC TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 1111 1111 1111 1111 08Fh TRISD(1) TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 1111 1111 1111 1111 090h TRISE — — — — TRISE3 TRISE2(1) TRISE1(1) TRISE0(1) ---- 1111 ---- 1111 091h PIE1 TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 092h PIE2 OSFIE C2IE C1IE — BCL1IE TMR6IE TMR4IE CCP2IE 000- 0000 000- 0000 093h PIE3 — NCOIE COGIE ZCDIE CLC4IE CLC3IE CLC2IE CLC1IE -000 0000 --00 -000 094h — Unimplemented — — 095h OPTION_REG WPUEN INTEDG TMR0CS TMR0SE PSA PS<2:0> 1111 1111 1111 1111 096h PCON STKOVF STKUNF —RWDT RMCLR RI POR BOR 00-1 11qq qq-q qquu 097h WDTCON — —WDTPS<4:0> SWDTEN --01 0110 --01 0110 098h OSCTUNE — — TUN<5:0> --00 0000 --00 0000 099h OSCCON SPLLEN IRCF<3:0> —SCS<1:0> 0011 1-00 0011 1-00 09Ah OSCSTAT SOSCR PLLR OSTS HFIOFR HFIOFL MFIOFR LFIOFR HFIOFS 00q0 0q0q qqqq --0q 09Bh ADRESL ADC Result Register Low xxxx xxxx uuuu uuuu 09Ch ADRESH ADC Result Register High xxxx xxxx uuuu uuuu 09Dh ADCON0 — CHS<4:0> GO/DONE ADON -000 0000 -000 0000 09Eh ADCON1 ADFM ADCS<2:0> — ADNREF ADPREF<1:0> 0000 -000 0000 --00 09Fh ADCON2 TRIGSEL<3:0> — — — — 0000 ---- 0000 ---- Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations are unimplemented, read as ‘0’. Note 1: Unimplemented on PIC16(L)F1718. 2: Unimplemented on PIC16LF1717/8/9 |
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