PIC24FJ256GA705-ISLASHM4. datasheet(402/412 Pages) MICROCHIP

402 / 412 page

PIC24FJ256GA705 FAMILY

DS30010118B-page 402

 2016 Microchip Technology Inc.

Code Examples

Basic Clock Switching ............................................... 107

Configuring UART1 Input/Output Functions ............. 140

Double-Word Flash Programming (C Language) ....... 78

EDS Read from Program Memory in Assembly.......... 61

EDS Read in Assembly............................................... 55

EDS Write in Assembly ............................................... 56

Erasing a Program Memory Block (C Language) ....... 75

Initiating a Programming Sequence ............................ 76

IOC Status Read/Clear in Assembly......................... 128

Port Read/Write in Assembly .................................... 128

Port Read/Write in C ................................................. 128

PWRSAV Instruction Syntax ..................................... 113

Setting the WRLOCK Bit ........................................... 253

Code Memory Programming Example

Double-Word Programming ........................................ 77

Page Erase ................................................................. 74

Row Writes.................................................................. 75

Code Protection ................................................................ 344

Comparator Voltage Reference ........................................ 315

Configuring................................................................ 315

Configurable Logic Cell (CLC) .......................................... 277

Configurable Logic Cell. See CLC.

Configuration Bits.............................................................. 329

Core Features ..................................................................... 15

CPU..................................................................................... 35

Arithmetic Logic Unit (ALU)......................................... 40

Clocking Scheme ........................................................ 98

Control Registers ........................................................ 38

Core Registers ............................................................ 36

Programmer’s Model................................................... 35

CRC

Data Shift Direction ................................................... 273

Interrupt Operation.................................................... 273

Polynomials............................................................... 272

Setup Examples for 16 and 32-Bit Polynomials ........ 272

Typical Operation...................................................... 273

User Interface ........................................................... 272

CTMU

Measuring Capacitance ............................................ 317

Measuring Die Temperature ..................................... 320

Measuring Time/Routing Current to A/D Input Pin ....... 318

Pulse Generation and Delay ..................................... 318

Customer Change Notification Service ............................. 407

Customer Notification Service........................................... 407

Customer OTP Memory .................................................... 344

Customer Support ............................................................. 407

Cyclic Redundancy Check. See CRC.

Data Memory Space ........................................................... 45

Extended Data Space (EDS) ...................................... 54

Memory Map ............................................................... 45

Near Data Space ........................................................ 46

Organization, Alignment.............................................. 46

SFR Space.................................................................. 46

Implemented Regions ......................................... 46

Map, 0000h Block ............................................... 47

Map, 0100h Block ............................................... 48

Map, 0200h Block ............................................... 49

Map, 0300h Block ............................................... 50

Map, 0400h Block ............................................... 51

Map, 0500h Block ............................................... 52

Map, 0600h Block ............................................... 52

Map, 0700h Block ............................................... 53

Software Stack............................................................ 57

DC Characteristics

Comparator Specifications........................................ 367

Comparator Voltage Reference Specifications......... 367

CTMU Current Source.............................................. 367

 Current (BOR, WDT, HLVD, RTCC)...................... 363

High/Low-Voltage Detect .......................................... 366

I/O Pin Input Specifications....................................... 364

I/O Pin Output Specifications.................................... 365

Idle Current (IIDLE) .................................................... 361

Internal Voltage Regulator Specifications................. 366

Operating Current (IDD) ............................................ 360

Power-Down Current (IPD)........................................ 362

Program Memory ...................................................... 365

Temperature and Voltage Specifications.................. 359

Thermal Operating Conditions.................................. 358

Thermal Packaging................................................... 358

Development Support ....................................................... 345

Device Features

28-Pin Devices............................................................ 17

44/48-Pin Devices....................................................... 18

Direct Memory Access Controller. See DMA.

DMA

Channel Trigger Sources............................................ 70

Control Registers ........................................................ 66

Peripheral Module Disable (PMD) Registers .............. 66

Summary of Operations.............................................. 64

Types of Data Transfers ............................................. 65

Typical Setup .............................................................. 66

DMA Controller ................................................................... 16

Electrical Characteristics .................................................. 357

Absolute Maximum Ratings ...................................... 357

V/F Graph (Industrial) ............................................... 358

Enhanced Parallel Master Port (EPMP) ........................... 239

Enhanced Parallel Master Port. See EPMP.

EPMP

Key Features ............................................................ 239

Memory Addressable in Different Modes.................. 240

Pin Descriptions........................................................ 241

PMDIN1 and PMDIN2 Registers .............................. 240

PMDOUT1 and PMDOUT2 Registers ...................... 240

Equations

16-Bit, 32-Bit CRC Polynomials................................ 272

A/D Conversion Clock Period ................................... 305

Baud Rate Reload Calculation.................................. 223

Calculating the PWM Period..................................... 176

Calculation for Maximum PWM Resolution .............. 177

Relationship Between Device and

SPIx Clock Speed............................................. 220

UARTx Baud Rate with BRGH = 0 ........................... 231

UARTx Baud Rate with BRGH = 1 ........................... 231

Errata .................................................................................. 12

Extended Data Space (EDS) ............................................ 239

External Oscillator Pins....................................................... 33

Flash Program Memory ...................................................... 71

and Table Instructions ................................................ 71

Control Registers ........................................................ 72

Double-Word Programming ........................................ 77

Enhanced ICSP Operation ......................................... 72

JTAG Operation.......................................................... 72

Operations .................................................................. 72

Programming Algorithm .............................................. 74

RTSP Operation ......................................................... 72

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