ADC12D040

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SNAS171E – JUNE 2002 – REVISED MARCH 2013

Angular Errors Between the Two Input Signals Will Reduce the Output Level or Cause Distortion

Figure 30. Angular Errors Between Two Input Signals

Table 1. Input to Output Relationship – Differential Input

VIN+

VIN−

Binary Output

2’s Complement Output

VCM − VREF/2

VCM + VREF/2

0000 0000 0000

1000 0000 0000

VCM − VREF/4

VCM + VREF/4

0100 0000 0000

1100 0000 0000

VCM

VCM

1000 0000 0000

0000 0000 0000

VCM + VREF/4

VCM − VREF/4

1100 0000 0000

0100 0000 0000

VCM + VREF/2

VCM − VREF/2

1111 1111 1111

0111 1111 1111

Table 2. Input to Output Relationship – Single-Ended Input

VIN+

VIN−

Binary Output

2’s Complement Output

VCM − VREF

VCM

0000 0000 0000

1000 0000 0000

VCM − VREF/2

VCM

0100 0000 0000

1100 0000 0000

VCM

VCM

1000 0000 0000

0000 0000 0000

VCM + VREF/2

VCM

1100 0000 0000

0100 0000 0000

VCM + VREF

VCM

1111 1111 1111

0111 1111 1111

Single-Ended Operation

Single-ended performance is lower than with differential input signals. For this reason, single-ended operation is

not recommended. However, if single ended-operation is required and the resulting performance degradation is

acceptable, one of the analog inputs should be connected to the d.c. mid point voltage of the driven input. The

peak-to-peak differential input signal should be twice the reference voltage to maximize SNR and SINAD

performance (Figure 29b).

For example, set VREF to 1.0V, bias VIN− to 2.5V and drive VIN+ with a signal range of 1.5V to 3.5V.

Because very large input signal swings can degrade distortion performance, better performance with a single-

ended input can be obtained by reducing the reference voltage when maintaining a full-range output. Table 1 and

Table 2 indicate the input to output relationship of the ADC12D040.

Driving the Analog Input

The VIN+ and the VIN− inputs of the ADC12D040 consist of an analog switch followed by a switched-capacitor

amplifier. The capacitance seen at the analog input pins changes with the clock level, appearing as 8 pF when

the clock is low, and 7 pF when the clock is high.

As the internal sampling switch opens and closes, current pulses occur at the analog input pins, resulting in

voltage spikes at the signal input pins. As a driving amplifier attempts to counteract these voltage spikes, a

damped oscillation may appear at the ADC analog inputs. The best amplifiers for driving the ADC12D040 input

pins must be able to react to these spikes and settle before the switch opens and another sample is taken. The

LMH6702 LMH6628 and the LMH6622, LMH6655 are good amplifiers for driving the ADC12D040.

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