Input/Output

Oscillator

System Clock

Power

Regulation

AND

Management

CoolRISC

CPU

Program Memory

Data Memory

Communications

SMBus

Peripherals

and

Timers

Interrupt

Controller

Analog Front End

Delta-Sigma ADC

AND

Integrating

Coulomb Counter

DMAddr (16-bit)

Data (8-bit)

PMAddr

(15-bit)

PMInst

(22-bit)

32 kHz

System Clocks

Reset*

2

1

8

8

8

Interrupt *

Event*

SRP

SRN

VCC

VSS

MRST

RBI

COM, ALERT,

KEYIN, SAFE,

SMBD, SMBC,

VEN, DISP

GPIOA

GPIOB

LED1...5

PWRM

SMBA, ADREN,

SDA, SCL,

PRECHG,VAUX,

BAT, PRES

System I /O (13 -bit)

Wake Comparator

Event*

Copyright © 2017, Texas Instruments Incorporated

10

bq78350-R1

SLUSCD0B – AUGUST 2015 – REVISED NOVEMBER 2018

www.ti.com

Product Folder Links: bq78350-R1

Submit Documentation Feedback

Copyright © 2015–2018, Texas Instruments Incorporated

8.2 Functional Block Diagram

8.3 Feature Description

The following section provides an overview of the device features. For full details on the bq78350-R1 features,

refer to the bq78350-R1 Technical Reference Manual (SLUUBD3).

8.3.1 Primary (1st Level) Safety Features

The bq78350-R1 device supports a wide range of battery and system protection features that can be configured.

The primary safety features include:

•

Cell over/undervoltage protection

•

Charge and discharge overcurrent

•

Short circuit protection

•

Charge and discharge overtemperature with independent alarms and thresholds for each thermistor

8.3.2 Secondary (2nd Level) Safety Features

The secondary safety features of the bq78350-R1 device can be used to indicate more serious faults via the

SAFE pin. This pin can be used to blow an in-line fuse to permanently disable the battery pack from charging or

discharging. The secondary safety protection features include:

•

Safety overvoltage

•

Safety undervoltage

•

Safety overcurrent in charge and discharge

•

Safety overtemperature in charge and discharge

•

Charge FET and Precharge FET fault