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ISO7340C, ISO7340FC, ISO7341C, ISO7341FC, ISO7342C, ISO7342FC

www.ti.com

SLLSEI6G – SEPTEMBER 2014 – REVISED JANUARY 2017

Product Folder Links: ISO7340C ISO7340FC ISO7341C ISO7341FC ISO7342C ISO7342FC

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Copyright © 2014–2017, Texas Instruments Incorporated

(1)

Also known as Pulse Skew.

(2)

tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3)

tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

(4)

The enable signal rate should be

≤ 43 Kbps.

7.13 Switching Characteristics—5-V Supply

VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH, tPHL

Propagation delay time

See Figure 14

20

31

58

ns

PWD(1)

Pulse width distortion |tPHL – tPLH|

4

ns

tsk(o)

(2)

Channel-to-channel output skew time

Same-direction Channels

2.5

ns

Opposite-direction Channels

17

ns

tsk(pp)

(3)

Part-to-part skew time

23

ns

tr

Output signal rise time

See Figure 14

2.1

ns

tf

Output signal fall time

1.7

ns

tPHZ

Disable propagation delay, high-to-high impedance output

See Figure 15

7

13

ns

tPLZ

Disable propagation delay, low-to-high impedance output

7

13

ns

tPZH

Enable propagation delay, high

impedance-to-high output

ISO734xC

7

13

ns

ISO734xFC

15000

23000(4)

tPZL

Enable propagation delay, high

impedance-to-low output

ISO734xC

15000

23000(4)

ns

ISO734xFC

7

13

tfs

Fail-safe output delay time from input power loss

See Figure 16

9.4

μs

(1)

Also known as Pulse Skew.

(2)

tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3)

tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

(4)

The enable signal rate should be

≤ 45 Kbps.

7.14 Switching Characteristics—3.3-V Supply

VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH, tPHL

Propagation delay time

See Figure 14

22

35

66

ns

PWD(1)

Pulse width distortion |tPHL – tPLH|

2.5

tsk(o)

(2)

Channel-to-channel output skew time

Same-direction Channels

3

Opposite-direction Channels

16

tsk(pp)

(3)

Part-to-part skew time

28

tr

Output signal rise time

See Figure 14

2.8

ns

tf

Output signal fall time

2.1

tPHZ

Disable propagation delay, high-to-high impedance output

See Figure 15

9

18

ns

tPLZ

Disable propagation delay, low-to-high impedance output

9

18

tPZH

Enable propagation delay, high impedance-

to-high output

ISO734xC

9

18

ISO734xFC

16000

24000(4)

tPZL

Enable propagation delay, high impedance-

to-low output

ISO734xC

16000

24000(4)

ISO734xFC

9

18

tfs

Fail-safe output delay time from input power loss

See Figure 16

9.4

μs