LMC6024

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SNOS621D – AUGUST 2000 – REVISED MARCH 2013

APPLICATION HINTS

AMPLIFIER TOPOLOGY

The topology chosen for the LMC6024 is unconventional (compared to general-purpose op amps) in that the

traditional unity-gain buffer output stage is not used; instead, the output is taken directly from the output of the

integrator, to allow rail-to-rail output swing. Since the buffer traditionally delivers the power to the load, while

maintaining high op amp gain and stability, and must withstand shorts to either rail, these tasks now fall to the

integrator.

As a result of these demands, the integrator is a compound affair with an embedded gain stage that is doubly fed

forward (via Cf and Cff) by a dedicated unity-gain compensation driver. In addition, the output portion of the

integrator is a push-pull configuration for delivering heavy loads. While sinking current the whole amplifier path

consists of three gain stages with one stage fed forward, whereas while sourcing the path contains four gain

stages with two fed forward.

Figure 25. LMC6024 Circuit Topology (Each Amplifier)

The large signal voltage gain while sourcing is comparable to traditional bipolar op amps, for load resistance of at

least 5 k

Ω. The gain while sinking is higher than most CMOS op amps, due to the additional gain stage;

however, when driving load resistance of 5 k

Ω or less, the gain will be reduced as indicated in the Electrical

Characterisitics. The op amp can drive load resistance as low as 500

Ω without instability.

COMPENSATING INPUT CAPACITANCE

Refer to the LMC660 or LMC662 datasheets to determine whether or not a feedback capacitor will be necessary

for compensation and what the value of that capacitor would be.

CAPACITIVE LOAD TOLERANCE

Like many other op amps, the LMC6024 may oscillate when its applied load appears capacitive. The threshold of

oscillation varies both with load and circuit gain. The configuration most sensitive to oscillation is a unity-gain

follower. See the Typical Performance Characteristics.

The load capacitance interacts with the op amp's output resistance to create an additional pole. If this pole

frequency is sufficiently low, it will degrade the op amp's phase margin so that the amplifier is no longer stable at

low gains. The addition of a small resistor (50

Ω to 100Ω) in series with the op amp's output, and a capacitor (5

pF to 10 pF) from inverting input to output pins, returns the phase margin to a safe value without interfering with

lower-frequency circuit operation. Thus, larger values of capacitance can be tolerated without oscillation. Note

that in all cases, the output will ring heavily when the load capcitance is near the threshold for oscillation.

Figure 26. Rx, Cx Improve Capacitive Load Tolerance

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