SLG47004V datasheet(50/302 Pages) RENESAS

50 / 302 page

Datasheet

8-Sep-2022

CFR0011-120-00

Revision 3.0

50 of 301

SLG47004

GreenPAK Programmable Mixed-Signal Matrix

with In-System Programmability and Advanced Analog Features

[59:54]

IN1 of LUT3_0 or Data of DFF3

[65:60]

IN2 of LUT3_0 or nRST (nSET) of DFF3

[71:66]

IN0 of LUT3_1 or CLK Input of DFF4

[77:72]

IN1 of LUT3_1 or Data of DFF4

[83:78]

IN2 of LUT3_1 or nRST (nSET) of DFF4

[89:84]

IN0 of LUT3_2 or CLK Input of DFF5

[95:90]

IN1 of LUT3_2 or Data of DFF5

[101:96]

IN2 of LUT3_2 or nRST(nSET) of DFF5

[107:102]

IN0 of LUT3_3 or CLK Input of DFF6

[113:108]

IN1 of LUT3_3 or Data of DFF6

[119:114]

IN2 of LUT3_3 or nRST (nSET) of DFF6

[125:120]

IN0 of LUT3_4 or CLK Input of DFF7

[131:126]

IN1 of LUT3_4 or Data of DFF7

[137:132]

IN2 of LUT3_4 or nRST (nSET) of DFF7

[143:138]

IN0 of LUT3_5 or CLK Input of DFF8

[149:144]

IN1 of LUT3_5 or Data of DFF8

[155:150]

IN2 of LUT3_5 or nRST (nSET) of DFF8

[161:156]

IN0 of LUT3_6 or CLK Input of DFF9

[167:162]

IN1 of LUT3_6 or CLK Input of DFF9

[173:168]

IN2 of LUT3_6 or nRST (nSET) of DFF9

[179:174]

IN0 of LUT3_7 or CLK Input of DFF11

Delay1 Input (or Counter1 nRST Input)

[185:180]

IN1 of LUT3_7 or nRST (nSET) of DFF11

Delay1 Input (or Counter1 nRST Input)

[191:186]

IN2 of LUT3_7 or Data of DFF11

Delay1 Input (or Counter1 nRST Input)

[197:192]

IN0 of LUT3_8 or CLK Input of DFF12

Delay2 Input (or Counter2 nRST Input)

[203:198]

IN1 of LUT3_8 or nRST (nSET) of DFF12

Delay2 Input (or Counter2 nRST Input)

[209:204]

IN2 of LUT3_8 or Data of DFF12

Delay2 Input (or Counter2 nRST Input)

[215:210]

IN0 of LUT3_9 or CLK Input of DFF13

Delay3 Input (or Counter3 nRST Input)

[221:216]

IN1 of LUT3_9 or nRST (nSET) of DFF13

Delay3 Input (or Counter3 nRST Input)

[227:222]

IN2 of LUT3_9 or Data of DFF13

Delay3 Input (or Counter3 nRST Input)

[233:228]

IN0 of LUT3_10 or CLK Input of DFF14

Delay4 Input (or Counter4 nRST Input)

[239:234]

IN1 of LUT3_10 or nRST (nSET) of DFF14

Delay4 Input (or Counter4 nRST Input)

Table 29: Matrix Output Table(Continued)

Address

Matrix Output Signal Function

Matrix Output

Number

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