4

TPS7B6933, TPS7B6950

SLVSDI2 – APRIL 2016

www.ti.com

Product Folder Links: TPS7B6933 TPS7B6950

Submit Documentation Feedback

Copyright © 2016, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltage values are with respect to the GND terminal.

(3)

Absolute maximum voltage, withstands 45 V for 200 ms.

6 Specifications

6.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Unregulated input voltage

IN(2)(3)

–0.3

45

V

Regulated output voltage

OUT(2)

–0.3

7

V

Operating junction temperature range, TJ

–40

125

°C

Storage temperature, Tstg

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-

C101(2)

±500

(1)

The output capacitance range specified in this table is the effective value.

(2)

Relevant ESR value at f = 10 kHz

6.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted)

MIN

MAX

UNIT

VI

Unregulated input voltage

4

40

V

VO

Output voltage

0

5.5

V

CO

Output capacitor requirements(1)

2.2

100

µF

ESRCO

Output ESR requirements(2)

0.001

2

Ω

TA

Operating ambient temperature range

–40

105

°C

(1)

The thermal data is based on the JEDEC standard high-K profile, JESD 51-7, 2s2p four layer board with 2-oz copper. The copper pad is

soldered to the thermal land pattern. Also correct attachment procedure must be incorporated.

(2)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.4 Thermal Information

THERMAL METRIC(1)(2)

TPS7B69xx

UNIT

DCY (SOT-223)

DBV (SOT-23)

4 PINS

5 PINS

RθJA

Junction-to-ambient thermal resistance

64.2

210.4

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

46.8

126.1

°C/W

RθJB

Junction-to-board thermal resistance

13.3

38.4

°C/W

ψJT

Junction-to-top characterization parameter

6.3

16

°C/W

ψJB

Junction-to-board characterization parameter

13.2

37.5

°C/W