CYT2B93BAS datasheet(4/165 Pages) INFINEON

4 / 165 page

Datasheet

002-22825 Rev. *J

2022-09-08

TRAVEO™ T2G 32-bit Automotive MCU

Based on Arm® Cortex®-M4F single

Table of contents

1 Features list .................................................................................................................................. 5

1.1 Communication peripheral instance list....................................................................................................... 6

2 Blocks and functionality ................................................................................................................ 7

3 Block diagram ............................................................................................................................... 7

4 Functional description ................................................................................................................... 8

4.1 CPU subsystem............................................................................................................................................... 8

4.2 System resources ........................................................................................................................................... 9

4.3 Peripherals.................................................................................................................................................... 11

4.4 I/Os................................................................................................................................................................ 15

5 CYT2B9 address map ................................................................................................................... 17

6 Flash base address map ................................................................................................................18

7 Peripheral I/O map .......................................................................................................................19

8 CYT2B9 clock diagram ..................................................................................................................21

9 CYT2B9 CPU start-up sequence ......................................................................................................22

10 Pin assignment ...........................................................................................................................23

11 High-Speed I/O matrix connections ..............................................................................................33

12 Package pin list and alternate functions .......................................................................................34

13 Power pin assignments ...............................................................................................................40

14 Alternate function pin assignments .............................................................................................41

15 Interrupts and wake-up assignments ...........................................................................................49

16 Core interrupt types ...................................................................................................................59

17 Trigger multiplexer ....................................................................................................................60

18 Triggers group inputs .................................................................................................................61

19 Triggers group outputs ...............................................................................................................64

20 Triggers one-to-one ....................................................................................................................65

21 Peripheral clocks ........................................................................................................................69

22 Faults ........................................................................................................................................73

23 Peripheral protection unit fixed structure pairs ............................................................................76

24 Bus masters ...............................................................................................................................87

25 Miscellaneous configuration ........................................................................................................88

26 Development support .................................................................................................................89

26.1 Documentation .......................................................................................................................................... 89

26.2 Tools............................................................................................................................................................ 89

27 Electrical specifications ............................................................................................................. 90

27.1 Absolute maximum ratings........................................................................................................................ 90

27.2 Device-level specifications......................................................................................................................... 93

27.3 DC specifications ........................................................................................................................................ 94

27.4 Reset specifications.................................................................................................................................... 98

27.5 I/O................................................................................................................................................................ 99

27.6 Analog peripherals ................................................................................................................................... 105

27.7 AC specifications ...................................................................................................................................... 112

27.8 Digital peripherals.................................................................................................................................... 112

27.9 Memory ..................................................................................................................................................... 124

27.10 System resources ................................................................................................................................... 125

27.11 Clock specifications................................................................................................................................ 136

28 Ordering Information ...............................................................................................................142

28.1 Part number nomenclature ...................................................................................................................... 142

29 Packaging ................................................................................................................................ 145

30 Appendix ................................................................................................................................. 152

30.1 Bootloading or end-of-line programming ............................................................................................... 152

30.2 External IP revisions.................................................................................................................................. 153

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