1

2SRFB1Cff

fpff =

RFB2

RFB1 RFB2

+

= fzff

VOUT

VFB

(Hz)

1

2SRFB1Cff

(Hz)

fzff =

40

10

2

10

3

10

4

10

5

10

6

FREQUENCY (Hz)

-120

-80

-40

0

10

7

-300

-250

-200

-150

-100

-50

0

Plotted Q values: 0.01, 0.05, 0.1, 0.2, 0.5, 1, 2, 10

Q = 0.01

Q = 0.01

Q = 10

Q = 10

LM3477

www.ti.com

SNVS141K – OCTOBER 2000 – REVISED MARCH 2013

SAMPLING POLE QUALITY FACTOR

In a current mode control architecture, there is an inherent resonace at half the switching frequency. The

LM3477/A internally compensates for this by adding a negative slope to the PWM control waveform (see

DEFAULT/ADJUSTABLE SLOPE COMPENSATION). The factor in the power stage equations above, Q,

describes how much resonance will be observed. Q is a function of duty cycle and mc. Figure 35 shows how the

power stage bode plot is affected as Q is varied from 0.01 to 10. The resonance is caused by two complex poles

at half the switching frequency. If mc is too low, the resonant peaking could become severe coinciding with

subharmonic oscillations in the inductor current. If mc is too high, the two complex poles split and the converter

begins to act like a voltage mode converter and the compensation scheme used above should be changed.

The Quality Factor Q of the Two Complex Poles is used to qualify how much resonant peaking is observed in the

Power Stage Bode Plot

Figure 35.

If Q>2, the sampling poles are imaginary and are approaching the right half of the imaginary plane (the system is

becoming unstable). In this case, Q must be decreased by either increasing the inductance, or more preferably,

adding

more

slope

compensation

through

the

RSL resistor (see DEFAULT/ADJUSTABLE SLOPE

COMPENSATION).

If Q<0.15, it means that one of the sampling poles is decreasing in frequency towards the dominant power pole,

fp1. There are three ways to compensate for this. Decrease the crossover frequency, add a phase lead network,

or use the output capacitor's ESR to cancel out the low frequency sampling pole.

One option is to decrease the crossover frequency so that the phase margin is not as severely decreased by the

sampling pole. Decreasing the crossover frequency to between 1kHz to 10kHz is advisable here. As a result,

there will be a decrease in transient response performance.

Another option is the use of the feed-forward capacitor, Cff. This will provide a positive phase shift (lead) which

can be used to increase phase margin. However, it is important to note that the effectiveness of Cff decreases

with output voltage. This is due to the fact that the frequencies of the zero fzff and pole fpff get closer together as

the output voltage is reduced.

The frequency of the feed-forward zero and pole are:

(61)

(62)

A third option is to strategically place the ESR zero fESR of the output capacitor to cancel out the sampling pole.

In this case, the capacitor CC2 will not be used to cancel out fESR. fESR should be placed around the crossover

frequency fc, but this will depend on how low Q is.

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