LMV551MFSLASHNOPB datasheet(21/41 Pages) TI2

21 / 41 page

LMV551, LMV552, LMV554

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SNOSAQ5H – FEBRUARY 2007 – REVISED AUGUST 2016

Product Folder Links: LMV551 LMV552 LMV554

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9 Power Supply Recommendations

For proper operation, the power supplies must be properly decoupled. For decoupling the supply lines, TI

recommends that 10-nF capacitors be placed as close as possible to the op amp power supply pins. For single-

supply, place a capacitor between V+ and V− supply leads. For dual supplies, place one capacitor between V+

and ground, and one capacitor between V- and ground.

10 Layout

10.1 Layout Guidelines

The V+ pin should be bypassed to ground with a low-ESR capacitor.

The optimum placement is closest to the V+ and ground pins.

Take care to minimize the loop area formed by the bypass capacitor connection between V+ and ground.

The ground pin should be connected to the PCB ground plane at the pin of the device.

The feedback components should be placed as close to the device as possible minimizing strays.

10.2 Layout Example

Figure 32. SOT-23 Layout Example

LMV551MF/NOPB Datasheet(PDF) 21 Page - Texas Instruments