TIME (2 Ps/DIV)

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TIME (2 Ps/DIV)

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15

LPV7215

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SNOSAI6J – SEPTEMBER 2005 – REVISED AUGUST 2016

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Feature Description (continued)

7.3.2 Output Stage

The LPV7215 has a MOS push-pull rail-to-rail output stage. The push-pull transistor configuration of the output

keeps the total system power consumption to a minimum. The only current consumed by the LPV7215 is the less

than 1-µA supply current and the current going directly into the load. No power is wasted through the pullup

resistor when the output is low. The output stage is specifically designed with dead time between the time when

one transistor is turned off and the other is turned on (break-before-make) to minimize shoot through currents.

The internal logic controls the break-before-make timing of the output transistors. The break-before-make delay

varies with temperature and power condition.

7.3.3 Output Current

Even though the LPV7215 uses less than 1-µA supply current, the outputs are able to drive very large currents.

The LPV7215 can source up to 17 mA and can sink up to 19 mA, when operated at 5-V supply. This large

current handling capability allows driving heavy loads directly.

7.3.4 Response Time

Depending upon the amount of overdrive, the propagation delay is typically 6 to 30 µs. The curves showing

propagation delay vs overdrive in the Typical Characteristics section shows the delay time when the input is

preset with 100 mV across the inputs and then is driven the other way by 10 mV to 500 mV.

The output signal can show a step during switching depending on the load. A fast RC time constant due to both

small capacitive and resistive loads shows a significant step in the output signal. A slow RC time constant due to

either a large resistive or capacitive load has a clipped corner on the output signal. The step is observed more

prominently during a falling transition from high to low.

The plot in Figure 29 shows the output for single 5-V supply with a 100-kΩ resistor. The step is at 1.3 V.

Figure 29. Output Signal Without Capacitive Load

The plot in Figure 30 shows the output signal when a 20-pF capacitor is added as a load. The step is at about

2.5 V.

Figure 30. Output Signal With 20-pF Load