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MB97R8110 Datasheet(PDF) 28 Page - RAMXEED LIMITED |
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MB97R8110 Datasheet(HTML) 28 Page - RAMXEED LIMITED |
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28 / 63 page ![]() 28 DS411-00007-3v1-E MB97R8110 Figure 5.2.2 – SpiWrite command sequence When AccessPassword is set, the data cannot be written. Therefore AccessPassword shall be cleared before SPI slave communication. If the specified area includes the WordAdr protected by Area Password, only unprotected address will be written and nothing will happen on protected address. If the specified area includes the WordAdr locked by Lock command or BlockPermalock command, only writable address will be written and nothing will happen on locked address for writing. 5.2.3 SpiRDSR The SpiRDSR command is to read 16 bits of error information on SPI slave communication (refer to Chapter 5.3.1). The command sequence is described in Figure 5.2.3. Through DI pin, the following data shall be input synchronously to the rising edge of SCK after XCS is fallen. SpiRDSR operate-code (8bit:05h) In response to the command input, the 16 bits of error information will be output from DO synchronously to the falling edge of SCK. And SpiRDSR command will be completed when XCS is raised. If XCS is raised before the command completes 16 cycles of clock to SCK, the command will be terminated and the output from DO will be “Hi-Z”. During the period of output from DO, any input from DI will be ignored. If XCS keeps “L” level after the command complete reading, the output from DO will be “L” level. The error information will be cleared after SpiRDSR command is completed. Figure 5.2.3 – SpiRDSR command sequence |
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