VND810SP

Electrical specifications

Doc ID 7377 Rev 5

11/27

Table 12.

Truth table

Conditions

Input

Output

Status

Normal operation

L

H

L

H

H

H

Current limitation

L

H

H

L

X

X

H

(Tj < TTSD) H

(Tj > TTSD) L

Overtemperature

L

H

L

L

H

L

Undervoltage

L

H

L

L

X

X

Overvoltage

L

H

L

L

H

H

Output voltage > VOL

L

H

H

H

L

H

Output current < IOL

L

H

L

H

H

L

Table 13.

Electrical transient requirements

ISO T/R

7637/1

Test pulse

Test level

I

II

III

IV

Delays and impedance

1

- 25V(1)

1.

All functions of the device are performed as designed after exposure to disturbance.

- 50V(1)

- 75V(1)

- 100V(1)

2ms, 10

Ω

2+ 25V(1)

+ 50V(1)

+ 75V(1)

+ 100V(1)

0.2ms, 10

Ω

3a

- 25V(1)

- 50V(1)

- 100V(1)

- 150V(1)

0.1µs, 50

Ω

3b

+ 25V(1)

+ 50V(1)

+ 75V(1)

+ 100V(1)

0.1µs, 50

Ω

4- 4V(1)

- 5V(1)

- 6V(1)

- 7V(1)

100ms, 0.01

Ω

5

+ 26.5V(1)

+ 46.5V(2)

2.

One or more functions of the device is not performed as designed after exposure and cannot be returned to

proper operation without replacing the device.

+ 66.5V(2)

+ 86.5V(2)

400ms, 2

Ω

Obsolete

Product(s)

- Obsolete

Product(s)