L9678P datasheet(35/215 Pages) STMICROELECTRONICS

35 / 215 page

DS11626 Rev 9

35/216

L9678P, L9678P-S

Start-up power control

214

4.3.5

VDD3V3 linear regulator

The fully integrated VDD3V3 linear regulator provides 3.3 V system voltage derived directly

from VDD5. This voltage rail is used in case a 3.3 V micro-controller is adopted. The stability

of the regulation loop is guaranteed by use of a small external capacitor. Current limitation is

implemented and its maximum current capability on VDD3V3 is 125 mA. The VDD3V3

regulator is enabled in the ACTIVE mode and continues operation in the PASSIVE mode

using power from energy reserve. VDD3V3 supply is monitored for system reset (see Power

On Reset and Reset in Section 4.5); voltage monitoring is based on a second redundant

bandgap voltage reference.

Note that if the VDDQ pin (digital outputs supply) is connected to the VDD3V3, and any of

the digital output pins are connected to 5 V logic, there is no internal blocking diode to

prevent from back-feeding this 3.3 V supply.

Figure 15. VDD3V3 control behaviour

GAPGPS01638

VDD3V3

OFF

In VDD5_ON state

VDD3V3_ON

VDD3V3

SHUTDOWN

Start T2 5ms

Not in VDD5_ON state

T2 timeout

VDD3V3

power mode control

POWER-OFF_MODE

SLEEP_MODE

L9678P Datasheet(PDF) 35 Page - STMicroelectronics