L5300GJ datasheet(6/26 Pages) STMICROELECTRONICS

6 / 26 page

Block diagram and pins description

L5300GJ

6/26

DS6145 Rev 8

Table 2. Pins description

N°

Name

Function

Not connected

2Res

Reset output. Internally connected to Vo through a 20 K pull up

resistor. This pin is pulled low when Vo < Vo_th. Keep open if not

needed

3Vcr

Reset delay. Connect an external capacitor between Vcr pin and

ground to adjust the reset delay time. Keep open if not needed

GND

Ground reference

5Vos

Regulator output voltage sensing (connect to Vo)

6Vo

5 V regulated output. Block to GND with a ceramic capacitor

(Co 220 nF for regulator stability)

7VS

Supply voltage, block directly to GND on the IC with a capacitor

Not connected

9En

Enable input. A high signal switches the regulator ON. Connect to

VS if not needed

EWi

Early warning input. This pin monitors the VS voltage level through

a resistor divider. Connect to VS if not needed

Not connected

EWo

Early warning output. Internally connected to Vo through 20 K

pull up resistor. This pin is pulled low when EWi is below bandgap

reference voltage. Keep open if not needed

-TAB

TAB is connected to the substrate of the chip: connect to GND or

leave open (see Figure 2).

L5300GJ Datasheet(PDF) 6 Page - STMicroelectronics