ISO1430DWR datasheet(27/49 Pages) TI2

27 / 49 page

Table 9-2. Receiver Functional Table

VCC1 (1)

VCC2 (1)

DIFFERENTIAL INPUT

RECEIVER ENABLE RE

OUTPUT R

VID = VA – VB

–0.02 V ≤ VID

–0.2 V < VID < 0.02 V

Indeterminate

VID≤ –0.2 V

Hi-Z

Open

Hi-Z

Open, Short, Idle

PD(2)

Hi-Z

PD(2)

Hi-Z

(1)

PU = Powered Up; PD = Powered Down; H = Logic High; L= Logic Low; X = Irrelevant, Hi-Z = High Impedance (OFF) state

(2)

A strongly driven input signal can weakly power the floating VCC1 through an internal protection diode and cause an undetermined

output.

The receiver is enabled when the receiver enable pin, RE, is logic low. The receiver output, R, goes high when

the differential input voltage defined by Equation 2 is greater than the positive input threshold, VTH+.

VID = VA – VB

(2)

The receiver output, R, goes low when the differential input voltage defined by Equation 2 is less than the

negative input threshold, VTH–. If the VID voltage is between the VTH+ and VTH– thresholds, the output is

indeterminate. The receiver output is in the Hi-Z state and the magnitude and polarity of VID are irrelevant when

the RE pin is logic high or left open. The internal biasing of the receiver inputs causes the output to go to a

failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted to one

another (short-circuit), or the bus is not actively driven (idle bus).

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ISO1450, ISO1452, ISO1410, ISO1412, ISO1430, ISO1432

SLLSF22H – APRIL 2018 – REVISED JUNE 2024

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ISO1430DWR Datasheet(PDF) 27 Page - Texas Instruments