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STA1080 Datasheet(PDF) 22 Page - STMicroelectronics |
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STA1080 Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 127 page ![]() Signal description STA108x, STA109x 22/127 DS13319 Rev 2 3.1.2 Analog audio 3.1.3 Digital audio Table 4. Analog audio signals Name GPIOs Balls DIR Power domain Description ADC0_AIN1_L - F18 I ADC0_1_AVDD ADC0 (AUX). Analog input 1 left. ADC0_AIN1_R - F19 I ADC0_1_AVDD ADC0 (AUX). Analog input 1 right. ADC0_AIN2_L - F16 I ADC0_1_AVDD ADC0 (AUX). Analog input 2 left. ADC0_AIN2_R - F17 I ADC0_1_AVDD ADC0 (AUX). Analog input 2 left. ADC1_AIN1_N - H19 I ADC0_1_AVDD ADC1 (Voice). Analog auxiliary differential input 1 negative. ADC1_AIN1_P - H18 I ADC0_1_AVDD ADC1 (Voice). Analog auxiliary differential input 1 positive. ADC1_MICIN_N - G19 I ADC0_1_AVDD ADC1 (Voice). Analog MIC differential input negative. ADC1_MICIN_P - G18 I ADC0_1_AVDD ADC1 (Voice). Analog MIC differential input positive. DAC_OUT0L - C18 O DAC_I/O_AVDD DAC0. Analog output Channel 0 left . DAC_OUT0R - D18 O DAC_I/O_AVDD DAC0. Analog output channel 0 right. DAC_OUT1L - B18 O DAC_I/O_AVDD DAC1. Analog output channel 1 left. DAC_OUT1R - D19 O DAC_I/O_AVDD DAC1. Analog output channel 1 right. DAC_OUT2L - C19 O DAC_I/O_AVDD DAC2. Analog output channel 2 left. DAC_OUT2R - B19 O DAC_I/O_AVDD DAC2. Analog output channel 2 right. Table 5. Digital audio signals Name GPIOs Balls DIR Power domain Description AUDIO_REFCLK GPIO7 B10 I/O VDD_IO Audio Master Clock. Input: it can be used as master audio clock for MSP peripherals . Output: audio master clock running at 512*Fs. I2S0_BCLK L1 I/O VDD_IO I2S0 (MSP0). Bit clock line. I2S0_FS L2 I/O VDD_IO I2S0 (MSP0). Frame Synchronization line. I2S0_RX K2 I VDD_IO I2S0 (MSP0). Receive data line. I2S0_TX K1 O VDD_IO I2S0 (MSP0). Transmit data line. I2S2_BCLK GPIO16 C9 I/O VDD_IO I2S2 (MSP2). Bit clock line. I2S2_FS GPIO17 D10 I/O VDD_IO I2S2 (MSP2). Frame Synchronization line. I2S2_RX GPIO18 D11 I VDD_IO I2S2 (MSP2). Receive data line. SAI1_BCLK GPIO19 C10 I VDD_IO SAI1. Serial Audio Interface 1 bit clock line. Slave only configuration. |
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