STM32L443CC datasheet(214/215 Pages) STMICROELECTRONICS

214 / 215 page

Revision history

STM32L443CC STM32L443RC STM32L443VC

214/215

DS11421 Rev 4

12-Jun-2017

(continued)

Updated baudrate in Section 3.27: Universal

synchronous/asynchronous receiver transmitter

(USART).

Updated Section 6.1.7: Current consumption

measurement.

Added footnote to Table 58: I/O current injection

susceptibility.

Updated Table 59: I/O static characteristics.

Updated Section 6.3.18: Analog-to-Digital converter

characteristics.

Added FADC min in Table 65: ADC characteristics.

Updated Table 71: DAC characteristics.

Added Ibias parameter in Table 74: COMP

characteristics.

Updated Section 7: Package information.

22-May-2018

Updated DAC terminology in all the document for

clarification: single DAC instance (= DAC1) with 2 output

channels.

Added ECOPACK2® information in Features.

Updated Section 3.9.1: Power supply schemes.

Added Figure 3: Power-up/down sequence.

Updated Clock-out capability in Section 3.11: Clocks

and startup.

Updated Figure 4: Clock tree.

Updated Section 3.14.1: Nested vectored interrupt

controller (NVIC).

Updated Section 6.3.2: Operating conditions at power-

up / power-down.

Updated ACoeff in Table 24: Embedded internal voltage

reference.

Updated Table 59: I/O static characteristics.

Added Section 6.3.16: Extended interrupt and event

controller input (EXTI) characteristics.

Updated Table 71: DAC characteristics.

Table 106. Document revision history (continued)

Date

Revision

Changes

STM32L443CC Datasheet(PDF) 214 Page - STMicroelectronics

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