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STM32L443CC Datasheet(PDF) 35 Page - STMicroelectronics |
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STM32L443CC Datasheet(HTML) 35 Page - STMicroelectronics |
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35 / 215 page ![]() DS11421 Rev 4 35/215 STM32L443CC STM32L443RC STM32L443VC Functional overview 56 interrupt is generated if enabled. LSE failure can also be detected and generated an interrupt. • Clock-out capability: – MCO: microcontroller clock output: it outputs one of the internal clocks for external use by the application. Low frequency clocks (LSI, LSE) are available down to Stop 1 low power state. – LSCO: low speed clock output: it outputs LSI or LSE in all low-power modes down to Standby mode. LSE can also be output on LSCO in Shutdown mode. LSCO is not available in VBAT mode. Several prescalers allow to configure the AHB frequency, the high speed APB (APB2) and the low speed APB (APB1) domains. The maximum frequency of the AHB and the APB domains is 80 MHz. |
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